Atomera Incorporated Aktie

Hello, everyone, and welcome to Atomera's Second Quarter 2026 Update Call. I'd like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera's IR website for 1 year. I'm Mike Bishop with the company's Investor Relations.

As in prior quarters, we are using Zoom, and we will follow traditional format. [Operator Instructions] We will open with prepared remarks from Scott Bibaud, Atomera's President and CEO; and Francis Laurencio, Atomera's CFO. Then we will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website.

Before we begin, I would like to remind everyone that during today's call, we will make forward-looking statements. These forward statements, whether in prepared remarks or during the Q&A, are subject to risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors sections of our filings with the Securities and Exchange Commission, specifically in the forms -- in the company's annual report on Form 10-K filed with the SEC on February 24, 2026. Except as otherwise required by federal securities laws, Atomera disclaims any obligations to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances.

Also, please note, during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website.

Now I would like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

Thanks, Mike, and good afternoon, everyone.

Q2 was a quarter of real momentum. Our customer engagements advanced across each of our target markets. We've had promising signs of new markets developing and in GaN, we turned a technical breakthrough into the early stages of a genuine commercial pipeline. Today, I'll move through gate-all-around, our broader customer activity, the growing pull we're seeing in memory, and then I'll spend real time on GaN, where I believe we may be witnessing the opening of a significantly new market for Atomera.

Let me start with gate-all-around. By now, you all know why this technology transition is so important. So I'll go straight to the news. We continue to work with 2 of the 4 players in this space. And this quarter, we passed a significant milestone with 1 of the 2 active gate-all-around customers, opening the door to further work on our unique silicon structures. These customers typically ask for a sequence of demonstrations before they'll accept a new material into their process flow. So clearing this stage is a meaningful step rather than a formality. It directly answers the manufacturability questions this customer had put in front of us. We remain in active discussions with the other 2 of our 4 target GAA customers, and our strategic partner continues to provide both the advanced test infrastructure and the ecosystem credibility that enables us to get in the door and helps us to stay there.

Memory is an area where interest is clearly accelerating. The large memory manufacturers are under real pressure to add both capacity and performance, and they have the budgets to evaluate options that can help them get there. Up until recently, we had significant interest from DRAM customers focused on our value proposition for planar periphery enhancements. Then suddenly, our customers' direction changed. The major underlying factor was that AI demand accelerated and pushed DRAM manufacturers to the vertical scaling era, including 4F2 and 3D DRAM and other advanced architectures. We can be confident from our interactions, however, that the technical merit of our value proposition for planar periphery is strong.

Today, we've established a new value proposition for 4F2 DRAM validated through discussions with multiple customers. We have shown that an MST starting wafer enables a vertical DRAM access transistor to be built using a next-generation DRAM fabrication process that is much cheaper than one of the most -- that most of the DRAM industry is currently pursuing. Our new concept solves fundamental device challenges in 4F2 while offering significant cost savings by leveraging MST's precise doping profile control capabilities. In addition to meeting with customers, we have completed a TCAD simulation study demonstrating its feasibility, and the results have been accepted to be presented at an IEEE conference in September.

Traditionally, the technology in NAND flash memory periphery circuit have lagged far behind DRAM, even though NAND memory cells themselves moved to 3D structures many years ago. In the history of Atomera, we have never established a serious value proposition for flash memory. However, that situation may be changing because in the last few weeks, we have learned from a major NAND supplier that AI is now pushing NAND to the point that they need the planar periphery boost that MST can provide. We have spent the last 5 years perfecting this value proposition for DRAM, and now it is applicable to NAND. If adopted by NAND flash manufacturers, this more than doubles the TAM for MST, which would obviously be very commercially significant.

Turning to the rest of our pipeline. Our large IDM customer program continues to progress according to plan. We're now at a stage where new device test data is coming in even as the next batch of experiments gets underway. Development efforts are moving fast, and our teams are working closely together. We are also working with other companies and engagements in power and our TrenchFET and HBT development continues to advance, aimed squarely at the efficiency and high-frequency demands emerging from AI data centers. In RF-SOI, wafers are still running with our second JDA partner, and we remain confident they will replicate the positive results we've demonstrated on other customer silicon.

Internally, our work on a high-throughput manufacturing process for RF-SOI, where the substrate supply chain is crucial is also going well and may be applicable to multiple other applications. RF manufacturers have long relied on the characteristics of RF-SOI substrates for switch and LNA performance, but they're also interested in future designs using gallium nitride due to its significant performance advantages, including the potential for fully integrated RF front ends, including power amplifiers. Unfortunately, due to silicon substrate parasitics, GaN RF development has been mostly limited to GaN-on-silicon carbide, which is a very expensive specialty starting wafer, which brings me to the exciting news regarding their preferred starting material, GaN-on-silicon.

In our May update call, we shared how MST could help solve parasitic channel problems in GaN-on-silicon, but we hadn't gotten the RF test results that could completely illustrate MST's effect. Later that month, performance data finally arrived, and we announced a technical breakthrough. MST makes GaN-on-silicon for RF devices commercially attractive. Our characterization partner, Incize, has now delivered RF data for MST enabling GaN-on-silicon that is frankly outstanding. The devices deliver effectively lossless RF together with outstanding harmonic distortion performance, leading to exceptional linearity. At the benchmark drive level, linearity is roughly 1,000x better than the GaN-on-silicon reference, and that improvement remains 2 to 3 orders of magnitude across the full suite of power. We know of no other GaN-on-silicon substrate that can duplicate these findings.

Just as important, these results approach the linearity and loss figures of advanced trap-rich RF-SOI, the technology RF designers typically reach for when they need this class of performance. Our partners at Incize independently confirm these benefits on their own world-class baseline, which is exactly the kind of third-party validation customers appreciate. For more details on our GaN-on-silicon test results, please see the white paper on our website. In June, we took this data to IMS, the International Microwave Symposium, and the results were terrific. Our announcement generated real enthusiasm on the show floor. And as a direct result, we are now working with several new potential customers who want to evaluate MST GaN-on-silicon in their own designs.

Here's why this matters strategically. Because our GaN-on-silicon results are now approaching RF-SOI class performance, but on a low-cost silicon substrate and with the inherent power and frequency headroom that GaN provides, we believe some designs that would traditionally be built in RF-SOI could instead move to GaN-on-silicon. That would be a meaningful shift in how RF front-end designs get built. And MST's performance may well be the catalyst that sets it in motion. If new RF design activity begins migrating towards GaN-on-silicon, Atomera would be positioned right at the start of a new high-growth market, and it's worth underscoring that MST is the enabler on both sides of that shift. So whichever path the customer chooses, Atomera benefits.

To summarize, we cleared a key gate-all-around milestone, established a new next-gen value proposition for DRAM, opened a new front in memory with NAND, kept our pipeline moving across power and RF-SOI and turned our GaN breakthrough into hard RF performance data, real industry enthusiasm and new customers with the potential to seed in an entirely new RF market. This is an exciting time to be at Atomera.

With that, I'll turn the call over to our CFO, Frank Laurencio, to review our financials.

Thank you, Scott.

At the close of the market today, we issued a press release announcing our results for the second quarter of 2026. This slide shows our summary financials. Revenue in the second quarter was $158,000, consisting of fees for wafer deliveries to customers, primarily to our large IDM customer. Our GAAP net loss for the second quarter of 2026 was $6.3 million or $0.17 per share compared to a net loss of $5 million, also $0.17 per share in the second quarter of 2025. On a non-GAAP basis, our loss for the second quarter was $5 million compared to a loss of $4 million in the second quarter of 2025.

GAAP operating expenses were $6.9 million in the second quarter of 2026, an increase of approximately $1.7 million from $5.2 million in the second quarter of 2025. Stock-based compensation, which is excluded from our non-GAAP results, increased by approximately $463,000 year-over-year and was $1.7 million in the second quarter of 2026 compared to $1.3 million in Q2 2025. In the second quarter of 2026, as compared to the prior year period, non-GAAP R&D expenses increased by $188,000, G&A expenses increased by $828,000 and sales and marketing expenses increased by $225,000. The increase in sales and marketing was mainly due to new executive hires in Q4 2025 and Q1 2026.

Turning to our sequential results. Second quarter GAAP operating expenses of $6.9 million compared to $6.2 million in the first quarter of 2026. On a non-GAAP basis, operating expenses increased sequentially by $350,000 to $5.1 million in the second quarter from $4.8 million in Q1, primarily reflecting higher G&A expense, offset partly by lower R&D expenses. These sequential fluctuations largely reflected timing of expenses for IP legal costs in G&A, which were heavier in Q2 and outsourced metrology activity in R&D, which was more concentrated in Q1.

Our balance of cash, cash equivalents and short-term investments on June 30, 2026, was $38.4 million compared to $41.1 million on March 31, 2026. We used $3.9 million of cash in operating activities in Q2 compared to $4.8 million in Q1 and $3.5 million in Q2 of last year. We did not sell any shares under our ATM during the second quarter of 2026. As of June 30, 2026, we had 39 million shares outstanding. We believe our current cash, which includes $23.6 million of net proceeds from the registered direct offering we closed in Q1 puts us in a strong position to execute on the opportunities ahead of us. And we will continue to be disciplined about controlling costs. However, we are experiencing cost increases, particularly in our outsourced engineering work. The recent very rapid growth in the semiconductor industry has tightened supply and our cost of tool leases, metrology and device fabrication are going up.

On our last 2 calls, I said we expected 2026 annual non-GAAP operating expense to be approximately $18.5 million. We budget for a range of plus or minus $250,000 around that number, and we now expect that we will end the year in the high end of that range.

With that, let me turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott?

Thanks, Frank.

Before we take questions, I want to thank our employees, our customers and our shareholders for their continued support. We're excited about the progress we made this quarter, clearing a key GAA milestone, broadening our memory opportunity into NAND and turning our GaN breakthrough into real RF results. We remain focused on translating our growing body of simulation and customer silicon evidence into commercial agreements that drive long-term repeatable revenue and a strong sustainable business. And we're happy to have you along for the ride.

Mike, we will now take questions.

Thank you, Scott. [Operator Instructions] Right now, our first question comes from Richard Shannon of Craig-Hallum.

Let me ask a few questions here. A lot of interesting comments here on your prepared remarks, Scott, let me jump into those here. First on gate-all-around here. You're characterizing the -- and please correct my language here. I'd probably get a good transcription of exactly what you said, but I think you essentially said that one of these customers has accepted a new material into their ecosystem here. Can you kind of convey the importance and difficulty of this? Have you seen -- can you compare it to other dynamics of a similar type in the past in the advanced logic space here? And then how would you describe the next steps here? How many other steps could you describe them? What has a customer told you about what they expect to do and to see from you next?

Okay. Great. Let me figure out any language from your kind of quasi-transcription there. So what we talked about this time is that we've cleared a hurdle with our gate-all-around customers where they have -- well, okay, I'm glad we're actually showing a picture of a gate-all-around structure here, and it shows you just how complicated it is. And what we expect that gate-all-around customers will do is they will ask us to prove that we can deposit MST in a structure like this and both physically and have positive electrical results on that over time.

And one of the milestones that we passed this quarter is that we did actually show one of those steps that I just talked about. They'll ask us to do a few more. But at some point, when we've deposited our technology into one of their structures, the next step for them is to take it into their own fab and deposit it on their own structure. They'll keep that secret from us. Those are the very, very critical IP that they won't share with us. And so in order to do that, they would need to take a license from us and then install it in their fab. So I think hopefully, that's a clear example of exactly where we are with them and what's left to be done before they would license it and start working towards production.

The other thing you asked is how is that comparable to how other materials are introduced, right?

Yes.

It's unusual to have a material introduced by a third party like us, but it is more common for a company like, let's say, Applied Materials or ASM or Lam to introduce a new material to a customer. So they might say, okay, we know you're having this problem here. And we figured out how you can use our tool and deposit some material in such a way that we think it will solve it for you. And the way that an OEM typically approaches that is that they talk about it with the customer and the customer asked them to do the same thing they're asking us to do. We need to see a demonstration of how that will work. And they will demonstrate it in their own labs. And then what frequently happens is that they'll go to one of these OEMs and say, okay, we need you to install a tool, a multimillion dollar tool in our factory so that we can test it in our own flow. And then if we like what we see, then we'll buy the tool from you and we'll buy more of them when we go to production. And so that's a very typical next step. You can see those advantages for the equipment OEM, they got a real good chance to sell more tools. And for the customer, the advantage is that they get to try it out without having a commitment. We don't quite have that flexibility. So the next step for them will be to license from us, install it on one of their tools in their own fab and do that testing.

Okay. So Scott, does that mean you're currently in some level of negotiation with the end customer here? Or do you expect that to happen -- start to happen soon?

Yes. I mean we've been in discussions with them about what that would imply and what our license terms would look like since we started working with them. And as we get close to the end of this, then it will accelerate so that we can close the deal. But we've already got kind of terms on the table.

Okay. I'm assuming you would expect this to not be a short sales cycle and unclear exactly how long this will take. Is that a fair conclusion? Or any perspective you can offer on time frame and chances of success there?

Yes. I think so far, we've passed a lot of hurdles with them and done some, I think, pretty impressive work. And I think if we can complete this cycle and get good electrical results out of that, then we would move on to discussions about installing in the next step. That could happen -- it's not going to happen in the next 2 months, but it could actually, if things went really well happen as early as over the course of late this year or a little beyond.

Now the other thing that could happen is that we get the results and they say, oh, these results are good, but they're not great. We need to do another round to prove because something went wrong, and we have to fix it and try again, and that could stretch it out by another 9 months or so. And that's why we're very hesitant to ever predict exactly when we get around to closing those deals.

Always makes sense to be safe there. So that makes a lot of sense. Let's step over to the DRAM space here. Just want to make sure I'm interpreting your comments correctly, Scott, here. It sounds like the technology transition process here within the DRAM space has probably restarted an investigation and testing cycle here. So we're kind of resetting a little bit here. Is that a fair conclusion of what I heard?

In DRAM, yes, we had -- the big opportunity for us in DRAM was in the periphery circuits. DRAMs have -- you could generally break them down to 2 parts. There's the memory cell, which is very, very advanced and the periphery circuits are analog-like circuits that tended to lag the technology node of the memory cells by quite a bit. And one of the reasons they lag it so much is because they needed to contend with variability across a wide set of process conditions and across the whole wafer. And that's one of the things that MST could help to solve, and we have proven that and had a bunch of papers on it and worked with a number of customers on that.

But what's happened is the emphasis in DRAM manufacturers has moved from advancing just regular DRAM to the next generation, but now starting to think a lot more about how can they actually solve the big capacity and performance issues that are in front of them. And it's most likely that their next steps would go to 3D because DRAMs right now are still planar on a single plane. So they're talking about 3D structures.

The first 3D structure they would build is something they call 4F2. And in 4F2, as I mentioned on my remarks, we have some very compelling technology where MST through our doping control capabilities can really help them to simplify their manufacturing process and make it much more viable to make these things at a cost-effective manner. And so we presented that to a few of them. They agree with the concept, and so we'll start moving further ahead with them in the near future.

Okay. Fair enough. On the DRAM space. Now it did sound like if I heard your comments right, you've made some great progress on the planar again, my transcription of your comments probably isn't perfect here, but something regarding the planar mechanism within DRAM here that can be applied to the NAND flash space here. So it sounds like that work, while DRAM may be kind of resetting here, it's actually a great dynamic here in the NAND flash. Am I interpreting that correctly?

Yes, exactly. Yes. In DRAM, we have -- as I mentioned earlier, we have a great technology for their planar periphery. And -- but in NAND, they never really cared that much about the planar periphery. They -- it wasn't a pressing issue for them, but now it's suddenly a pressing issue. They need to really amp up performance on the periphery. And so all that work that we've done for DRAM is now interesting to the guys in NAND flash, which is an entirely new TAM that we've never considered before because we didn't really think we have something to offer to the flash.

As a matter of fact, I think you've asked me before, if there are any parts of the semiconductor market we didn't think we were applicable to, and I probably answered that was flash memory, we didn't see a path. But now we see a real path, and that's amazing. NAND actually manufactures more wafers per year than DRAM, although I think DRAM revenue is higher. But for us, where we're selling products based on wafer shipments, that's a really good opportunity.

Okay. Great. That is helpful on those topics. Let me touch on RF and GaN here, which is really interesting. Again, my transcription of your comments here about getting linearity 1,000x better than the GaN-on-silicon reference seems an amazing accomplishment. And I have never thought that anyone would consider using GaN-on-silicon as a replacement for RF-SOI. And I know that space well enough to know that it goes into a lot of cell phones. So are you basically saying that people are now considering using RF-on-silicon -- excuse me, GaN-on-silicon?

Well, there's no doubt if you've gone to technical conferences for RF-SOI for the last few years, they're all talking about how it's kind of reaching its maximum performance headroom that it can get to. And by that, they mean the high-frequency performance and the ability to handle higher powers. And they're looking at all kinds of different ways of trying to keep that road map going forward. But one of the most promising is GaN because GaN does handle high-frequency RF performance much better and high power. And what we have just demonstrated -- now, okay, but last call, we talked about how GaN-on-silicon carbide is what people have been using for RF in the past, but it's a very expensive substrate. It's specialty product.

You're never going to start making fully integrated front end for mobile phones with that substrate. But GaN-on-silicon can be used to do that. It has the cost levels that you could do, but it was having problems with RF. And now we seem to have solved the RF problems and this data that I showed in the call here is actually a great example of some of the big benefits that we are getting. And I will point out that we -- at the end of May, we put out a white paper explaining how MST improves GaN-on-silicon. And then we did a press release based on getting new data, and we put that into our white paper. But this data I'm showing here is even newer data than what's in our white paper, showing how incredible the improvement in harmonic distortion is over a control GaN-on-silicon wafer.

Okay. It looks impressive from what I understand, which is probably only a small subset of what's really important here, but it seems like a very impressive achievement here. So...

One last statement because you had asked about RF-SOI designs. The one thing that RF-SOI has not been able to do is to support power amplifiers because it just didn't handle the high-power performance. But what you can see here in this data, especially in the lower plot is that our MST can handle -- I mean, a GaN-on-silicon enabled by MST can handle extremely high power levels. So then you could make a single design that's a fully integrated RF front end, including the switches and the LNA and the power amplifiers, and that's a key breakthrough.

Interesting. Okay. That's -- I mean, my understanding is that the amount of power amp content versus the RF-SOI is probably leans towards the power amp side. So if you can include that content in there would seem to be a big increase in your TAM. Is that how you see it?

I think so. I don't know exactly how much of the power amplifier market this could take over. This is brand-new data, and we haven't even dug in as far as we need to yet, but it seems like a very promising opportunity.

Okay. Thinking about where such products might be made here, I mean, do you look at guys who are making RF-SOI today as the obvious place to adopt these solutions? Do we need different infrastructure, different customer base, different material systems, et cetera, to commercialize this technology?

Certainly, the -- I think the key designers that are leading are -- I don't see that changing too much because they understand the marketplace and they understand the RF challenges. But the manufacturing infrastructure may change if you to go to GaN-on-silicon. All of the RF-SOI manufacturers today don't necessarily have a GaN-on-silicon capability, but it is something that we could work with them to enable by licensing our technology.

Okay. All right. Some great stuff here, Scott. I think Frank is getting a little bored, so I want to gauge in for one question here, a very simple one, Frank, is on the OpEx here. So essentially, are you telling us that your $18.5 million OpEx number is now going to be closer to $21 million for the year? Is that what you're telling us?

No, no, no. I said plus or minus $0.25 million is kind of how we budget

$0.25 million.

That is a range of $18.25 million to $18.75 million, and it will be more on that $18.75 million range.

Okay. I got the decimal point in the wrong place here. So I'm glad I asked that question. And then how do we think about go forward from this year? I mean is there any way we would kind of annualize the step-up here? Or any other adds we need to have as we're -- it sounds like we're having some great success across a number of different applications. Should we think about $1 million or $2 million step-up as we get to next year?

Yes, I'm not giving guidance really for next year. But I think what you'll see is, particularly next quarter, you'll see some of these structural increases in costs go through our P&L and you'd be able to model that going forward. But it's -- I would characterize the increases as significant from the costs our service providers are imposing on us. We haven't closed off negotiations on all of those, and those tend to be long-term contracts. We have 2 major tool leases to support our development activities. And one of those is still in progress. So I'm not ready to sort of say where it's going to come out. But we've been spending about $1.8 million a year for one of our tool leases, and that was in all of our 10-Q disclosure. And I would expect that to go up pretty significantly. I don't have a number to land on that yet. That will really be at 2027, not sort of as much in the second half of this year.

That's a good perfective. That's all for me, guys. Congratulations on all the great work here.

Thank you, Richard. And a few questions coming in here on the Q&A line. First of all, is there an update on the PowerAmerica relationship?

Yes. So for those of you who are not aware, we made a proposal to PowerAmerica in early this year to do a partnership with a few other companies to do a development of a GaN power device and testing. Our understanding is that, that program would be awarded in May, and we have not heard that we have been awarded that program. We also haven't heard we haven't been awarded it, but I presume that we will not -- that we did not get it based on the timing, and I have heard that other companies, although I don't know who they are, were awarded that.

That although disappointing, I would say a few things about that. First of all, that was a program in GaN-on-power. And early this year, we did think GaN-on-power was our primary focus. But as of the recent test data that we've gotten, we're more focused on GaN-on-RF. So in some ways, I'm almost glad that my engineering team will be more focused on that primary market. Second thing I'll say is it wasn't really a -- it was a good opportunity to partner with a number of people and show up our stuff, but it wasn't really a financially significant program for us. I think the entire program would have only brought in about $300,000 for us if we had won it. We will continue to try to join in on CHIPS Act and other proposals that we think will benefit us in our target spaces. But unfortunately, that one didn't come through.

Okay, thank you. And is there an update on the relationship with STMicroelectronics?

There's not really an update. Last quarter, we said that we were still working with their business units, and we had hoped that we would put together a deal with them. That's still on the table, but we don't have anything to announce at this time.

Okay, thank you. And a follow-up question on GAA. Specifically, what process does the major milestone at one customer refer to? And then a follow-up to that would be how long does it take? And can it be said to lead into license negotiations?

Yes. I mean the goal of completing this demonstration is absolutely to lead into license negotiations. That would be what we hope -- we hope will be our next step. And I can try to describe -- well, I think I described earlier, but let me try to make a little bit clearer. In the early stages of making a gate-all-around transistor, you are building a very -- that very complicated structure that we showed a picture of. And we need to grow MST conformally all along those different structures inside there. And then the customer has to grow, fill in silicon that's doped to a certain level.

And every single piece of that has to -- and our MST affects the doping level and what will happen there and all different pieces of that have to come together so that if we can deposit it all properly and if we understand through TCAD modeling what the impact on the doping levels will be, then that will lead to an electrical result that's significantly better. And so that's what we're working on. We've done a lot of work on doing those depositions. We've got a bunch of the fill work done. We -- and we're working on that electrical result that we'll ultimately get to. And hopefully, if we can do that in one try, then it will lead to license discussions fairly soon. It may take more than one try, as I mentioned earlier to Richard.

Okay. Thanks, Scott. And if you want to proceed with any closing comments, I think that's all the time we have for Q&A right now.

Okay. Well, let me thank you all for joining us to hear the progress within Atomera. Please continue to look for our news, articles, white papers and blog posts, which are available along with investor alerts on our website, atomera.com. Should you have additional questions, please contact Mike Bishop, who will be happy to follow up. And thank you again for your support, and we look forward to our next update call.

Thank you. This concludes the Atomera call.

Hello, everyone, and welcome to Atomera's First Quarter 2026 Update Call. I'd like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera's IR website for 1 year. I'm Mike Bishop with the company's Investor Relations.

As in prior quarters, we are using Zoom, and we will follow a similar format. [Operator Instructions] We will open with prepared remarks from Scott Bibaud, Atomera's President and CEO; and Frank Laurencio, Atomera's CFO. Then we will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website.

Before we begin, I would like to remind everyone that during today's call, we will make forward-looking statements. These forward-looking statements, whether in prepared remarks or during the Q&A session, are subject to inherent risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors section of our filings with the Securities and Exchange Commission, specifically in the company's annual report on Form 10-K filed with the SEC on February 24, 2026. Except as otherwise required by federal securities laws, Atomera disclaims any obligation to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances.

Also, please note that during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website.

Now with that, I'd like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

Thanks, Mike, and good afternoon, everyone. This quarter, we made solid progress with multiple customers across our highest value markets while also expanding the breadth of applications where MST can solve real current pain points for the semiconductor industry. We're seeing strong customer pull in advanced logic, memory and wide band gap materials like GaN and power and in RF, areas that are being shaped by the rapid growth of AI infrastructure, which is driving the need for better power efficiency, signal integrity and system performance.

Today, I'll start with an update on gate-all-around, where we've been working closely with customers and our strategic partners to validate MST in these advanced geometries. Then I'll touch on our customer pipeline and close with updates on GaN, giving insights on some exciting new technical results that are shaping near-term opportunities.

As we said before, the move to gate-all-around at 2 nanometers and beyond is one of the most important architectural transitions in the industry, and it's also one of the most difficult manufacturing environments since fabs must build incredibly complicated structures at line widths of 5,000x smaller than a human hair, where a small amount of atomic migration can cause big problems.

Gate-all-around transistors are the building blocks for AI infrastructure and dopant diffusion control is critical to their effectiveness in terms of performance and reliability. Therefore, the industry is demanding clear proof that any new material can be deposited precisely and that it delivers measurable benefits in advanced silicon devices.

Today, there are 4 companies in the world developing gate-all-around transistors, TSMC, Samsung, Intel and Rapidus. We know that each of them can use the capabilities of MST, so it's our goal to achieve adoption at all 4. Further, as these companies transition to the generation beyond gate-all-around called CFET, our technology becomes even more essential. So working with us now is in their best interest long term.

In our last earnings call, we have just received measured silicon results that prove MST is the best solution for a critical source strain liner application in these small geometry transistors. At this point, we're actively working on evaluations of our technology with 2 of our target gate-all-around customers and discussions are underway with the others.

It is typical that a customer asked to conduct multiple demonstrations before agreeing to accept a new technology for implementation in their fab wafer flow. These demonstrations help to validate our claims while simultaneously addressing the detailed implementation and functionality questions these customers are focused on solving.

We also expanded the scope of our work with our strategic development partner this quarter, which is important because it strengthens both our technical velocity and our credibility with the ecosystem. Their test and development infrastructure helps us generate the kind of data that advanced node customers insist on seeing before engaging and their endorsement will certainly help us engage a broader set of teams within each target account.

Each of the large memory manufacturers are facing similar challenges to the gate-all-around customers as they develop their next-generation transistors in DRAMs and high-bandwidth memories. Our team is in discussions with them right now, and we are currently working on multiple solutions using MST to assist in this area. Right now, memory manufacturers would do almost anything to get greater fab capacity, and they have the resources to evaluate different methods of doing so. We hope to take advantage of that opportunity with solutions enabled by MST.

The momentum we're seeing in the advanced node transistor space is a result of many years of work targeting current market trends. The macro challenges that AI success has put front and center, capacity and performance of CPUs, GPUs, logic and memory, the power demands of cloud providers and the increased costs associated with these are all areas that Atomera can help solve. For that reason, we believe that MST is a fundamental tool for the future of AI.

Our customer pipeline remains very active across multiple domains. For example, our work with our large IDM customer continues to go well, and we expect additional results from wafer runs soon. Our efforts with ST Microelectronics are bearing fruit, and we are confident we will reengage with them again in the near future, consistent with our view that MST can create value across multiple product lines, especially in a large diversified IDM or foundry.

In RF SOI, we are seeing strong results confirming our extensive TCAD simulations. The technical results we've been focused on, including for both power switch and LNA have been confirmed through customer silicon runs. The near-term question is less about performance and more about the most efficient path to commercialization, particularly in cases involving fabless licensees where aligning the business structure with the manufacturing flow can be complex.

In power devices, we're seeing excellent potential in new development work being done to target MST at both TrenchFET and HVT transistors, useful in high-frequency, high-speed and high-voltage applications. At the same time, wafers continue moving forward with our second JDA partner, and we'll keep pushing those efforts toward production pathway.

Turning to GaN. We made meaningful advancements this quarter, including a breakthrough that could give us a technical leadership in RF GaN on silicon to augment the advantages previously outlined for power GaN on silicon. To explain the innovation, I need to give a little background.

GaN on silicon is a much more economical growth method than alternatives built on exotic substrates like silicon carbide or sapphire. But when GaN on silicon is manufactured due to the GaN stack growth process, gallium and aluminum ions gather at the silicon substrate interface, forming an unwanted sheet charge layer called a parasitic channel, which is well known to limit RF performance and GaN on silicon applications. In fact, its elimination has been the subject of materials and growth studies for more than 20 years.

In the past few weeks, we received preliminary performance data suggesting MST can dramatically reduce the parasitic channel. It does this by using MST's fundamental interface engineering to block the gallium and aluminum ions from getting into the silicon substrate. An industry veteran told us that in his 20 years, this is the best measured sheet charge data he has ever seen. We're continuing to validate this very promising discovery with our test and measurement partners.

RF GaN on silicon is a value in the wireless infrastructure, military, defense and satellite markets. It's also being actively evaluated for high integrated RF front ends such as those for 6G cellular. So the market potential is large and growing fast. We are actively engaging on both 200-millimeter and 300-millimeter wafer sizes in GaN depending on our customers' requests. That matters because the wafer size for GaN on silicon is one of its key advantages leading directly to a customer's path to high-volume production, low-cost structure and a set of fabs that can support ramp, including opening doors for new applications with conventional silicon fabrication methods and devices.

We're seeing expanded interest in partnerships across the ecosystem, including engagements involving Incize, Synopsys, Texas State University, Sandia and others. Those kinds of parallel tasks, commercial customers plus research and ecosystem partners can compress development cycles and accelerate the time from promising materials data to something customers can qualify and deploy. Work here is aimed at generating data that is both technically rigorous and directly translatable to customer device requirements.

Finally, a quick note on our announcement last week about expanding our collaboration with Synopsys. We've worked with Synopsys for years to enable accurate modeling of MST inside the Sentaurus TCAD environment through our MST CAD tool set. This expanded collaboration extends that relationship into GaN workflows for both high-value RF and power devices.

Practically, this means we're working closely with Synopsys to provide feedback on their GaN models, and we'll be jointly developing marketing materials so customers and partners can evaluate the physical and electrical effects of MST and GaN more quickly and with higher confidence.

To summarize, we're making progress where it matters, expanding and deepening gate-all-around engagements, broadening GaN from power into RF with concrete technical innovations and continuing to advance multiple customer programs across our pipeline. We remain focused on converting technical validation into commercial structures that can drive repeatable revenue and are confident in our ability to do so. This is indeed an exciting time for Atomera.

With that, I'll turn the call over to Frank, our CFO, to review our financials.

Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the first quarter of 2026, and this slide shows our summary financials.

Our GAAP net loss for the first quarter of 2026 was $6.1 million or $0.17 per share compared to a net loss of $5.2 million, which was also $0.17 a share in Q1 of 2025. On a non-GAAP basis, net loss last quarter was $4.9 million or $0.14 a share. And our Q1 2025 net loss was $4.4 million or $0.15 a share.

GAAP operating expenses were $6.2 million in Q1 of 2026, which was an increase of $742,000 from $5.5 million of GAAP operating expense in Q1 2025. Stock compensation expense, which is excluded from non-GAAP results, increased by $397,000, primarily due to new hires and our adoption in Q1 of 2025 of performance stock units, or PSUs, for executives.

PSUs vest over 3 years, whereas the time-based options and RSUs that we had previously granted to executives vested over 4 years. Although the vesting period is shorter, PSUs vest only if our stock performs well relative to the Russell 2000. The first tranche of PSUs issued in Q1 2025 lapsed without vesting because we did not hit the required stock price performance threshold.

With the exception of stock compensation expense, the drivers of GAAP and non-GAAP expenses are substantially the same. So I will drill down into other factors that impacted our expenses by focusing on non-GAAP numbers. Please refer to the slide presentation for a reconciliation between GAAP and non-GAAP results.

Non-GAAP operating expenses in the first quarter were $4.8 million, a year-over-year increase of $348,000 from $4.4 million in Q1 2025. Sales and marketing expense increased by $203,000, reflecting our 2 executive hires since October. R&D expenses increased by $127,000 from $2.8 million in Q1 of last year to $2.9 million in the first quarter of this year, primarily due to higher spending on outsourced engineering to support the wafer runs for our gate-all-around engagements, our IDM customer and our JDA customer, which drives spending on metrology. G&A expenses were basically flat from the first quarter of last year.

Turning to sequential quarterly results. First quarter 2026 non-GAAP net loss was $4.9 million or $0.14 a share compared to net loss of $3.3 million or $0.10 a share in Q4 of 2025. Operating expenses were $4.8 million in Q1, which is a $1.6 million increase from $3.2 million in Q4.

Let me offer some color on the magnitude of the sequential increase. As I explained on our last quarterly call, our Compensation Committee elected not to pay the full 2025 executive bonus, withholding approximately $669,000, which normally would have been paid out in January. The committee provided the executive team the opportunity to earn back the withheld amount in 2026 upon achievement of commercial objectives. This led to us reversing accrued bonus expense in the fourth quarter, which skews the comparison of expenses between Q1 and Q4.

Our balance of cash, cash equivalents and short-term investments on March 31, 2026, was $41.1 million compared to $19.2 million on December 31, 2025. We used $4.6 million of cash in operating activities during Q1 compared to $3.2 million in Q4 and $4.8 million in Q1 of last year. As is typical for us, cash used in the first quarter of every year is higher than other quarters due to payments for items that are expensed over the year.

In February of this year, we closed on a $25 million registered direct stock offering, selling 5 million shares of common stock at $5 per share, netting us proceeds of $23.6 million after fees and expenses. Prior to this offering, we had also raised $3.2 million in Q1 by selling approximately 1.3 million shares under our ATM at an average price of $2.47. Currently, we have 38.7 million shares outstanding.

With the proceeds of our equity offering, we feel that our current cash balance puts us in a strong position to execute on the opportunities ahead of us, but we will continue to be disciplined about controlling our costs. On our last call, I said that we expected our 2026 annual non-GAAP operating expense to be approximately $18.5 million, and we are holding to that number. To reiterate, the reason why the expense increase appears as large as it does over $15.9 million of OpEx in 2025 is the bonus deferral, which essentially shifted expenses out of Q4 and moved them into 2026. Organic increases in spending mainly relate to the hiring of our VP of Sales in Q4 last year and our VP of Marketing in Q1.

Revenue in Q1 was $11,000 and consisted of fees for wafer deliveries to the large IDM that Scott talked about. And we have $96,000 of deferred revenue on our balance sheet. Approximately $46,000 of revenue that we expected to recognize in Q1 pushed out to Q2 because wafer shipments that we anticipating making last quarter pushed out to early this quarter. Accordingly, we expect Q2 revenue to be in the range of $50,000 to $100,000.

With that, I will turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott?

Thanks, Frank. And before we take questions, I want to thank our employees, our customers and our shareholders for their continued support. We're excited about the progress we're making, and we remain focused on translating our growing body of simulation and customer silicon evidence into commercial agreements that can drive long-term repeatable revenue and a strong sustainable business.

Mike, we will now take questions.

[Operator Instructions] And right now, it looks like Richard is ready to ask a first question. Richard, please go ahead.

Scott, the gate-all-around stuff here, you made some very interesting comments. I want to touch on a few of these things here. So you mentioned that you've got -- now have measured silicon results here and your customers have said that they're better than the other solutions that they have here. Just want to make sure that that's what you said, and then I have a couple of follow-ups on that topic.

Yes, you maybe -- are you talking about GaN or gate-all-around?

Gate-all-around.

On gate-all-around, we do have measured silicon results. And we evaluated our results against another method that people in the industry are using to accomplish the same type of thing we're doing, and our results are a significant improvement. So yes, we have definitely had that, and we're showing that to customers.

So to follow up on this, so I assume that the measured results are wafers run at 1 of these 4 targeted customers. Is that correct? Or it's independent?

In fact the measured results are something that we did in conjunction with our strategic partner, where they had gate-all-around structures, and we use those devices to grow MST on those gate-all-around structures in the wafer, and then we're able to conduct this testing. So now that's -- if you think about how we approach customers, we go out and we show customers our simulation data, which we can do without a strategic partner. But then having silicon tested data is a massive improvement over that. So that's been able to really open the doors for us to get into the customers. The next step from there is the customer will typically say, okay, we can see you did that on your strategic partners' structure. Now we want you to do it on our structure because our structure is different. Everybody is different.

And when I mentioned that we're -- we have work underway with 2 of the target customers there doing demonstrations, that's the step we're at where we're trying to do -- implement our technology on their structures and show them that. We believe that the step after that, Richard, will be that they'll have to install MST in their fabs to do any further testing because these structures are so small and hard to manufacture that it's difficult to do a lot more work by having us run demonstrations in our fab.

Okay. So to that point, do you have a commitment to attempt to do this on your customer structures? Or is just the discussions to get that agreed to?

We're working on it with 2 of them actually -- I don't know what you mean by commitment, but I guess they're sending us wafers and we're putting on. So yes, that's pretty committed.

Okay. That sounds pretty good. So what's the time frame for this work to get done? And then I assume, given what I've heard for the many years that I followed you guys that the analysis of these can often take a while, and these are more complex than most. So I would assume that analysis takes a while. So what's the kind of the turnaround time between getting that done, analyzing and getting to that next step? What do you foresee that taking?

It's going to take several months. Just us doing the work, we have to really do a lot of development work to just figure out how to grow things effectively in these tiny devices that they're sending us. And so normally, when someone sends us wafers within 3 weeks to a month, we can turn those around and send them back. In this case, my guess is it might take us longer than that, 2 to 3 months. And then when we sit in the back, they have to put them in their fab and run them for several months. So it could be in the order of 6 months before we start to see results coming out of this.

Now in -- I mentioned a few times on the call and both structural analysis, which is where they are looking at what we did for deposition in those structures and making sure that what we did was appropriate, they can do that pretty quickly because you're taking TEM images like electron microscope images and looking at what we did, that -- those results will come quickly, but the electrical results will be the result of running the wafers through the whole line.

Got it. Okay. And so you're expecting or expecting to run wafers with -- wafers from 2 different GAA customers then over the next few months?

Yes.

Okay. Going back to my first question here and understanding the results you measured with the runs you did with your equipment partner. I want to get a sense of whether the customers agree that the comparisons you've done with, I think, an industry standard approach to dopant diffusion, they actually agree with that as well that, that is much better than what they've been -- what they can get internally? Or is this just what your equipment partners concluded for you?

I think there's no doubt that the customers that we've been able to engage with and get down to lots of details on it, they have been impressed enough that they want to move forward with these further demonstrations. So yes, they definitely saw the benefit of using MST to conduct -- to block the dopant diffusion in the areas that we're talking about and how it works better than what they're currently implementing.

Okay. Okay. Fair enough. Some really interesting stuff going on there. Maybe a couple of other quick questions. So on the DRAM side, it sounds like we made some progress here. But if I'm to compare that with the progress on the logic side to the memory side, it sounds like the logic is reasonably farther ahead than memory. Is that a fair comparison?

Yes, that's true. We are talking with the memory manufacturers, and they -- one thing, memory is quite a different architecture than logic that we're using gate-all-around. But in memory, they're having the same type of dopant diffusion problems with their newer architectures as the gate-all-around folks are and our technology is directly applicable to that. So we have a lot of interest in -- from the DRAM guys about that. We're also talking to them about some other solutions that may be able to help them in different ways. So it's lots of different vectors of how we're engaged with DRAM guys. I should say with the memory guys because it's also in high bandwidth memory, not just DRAM. But we're further ahead with the gate-all-around customers than we are with them.

Okay. All right. Fair enough. Maybe a question on the GaN side here. So I think before -- my recollection is you're talking more about applications of GaN into the power space, but more recently, it's been in RF here. How would you characterize kind of the -- which one is kind of the leader in terms of getting to the next step here and getting installation licenses, I know that's not the right term, but it's kind of what I think of it, installation licenses or using the wafers with that already built in there, which one is kind of in the lead here if either one is notably better?

Okay. So it's kind of interesting where you're right saying that we initially targeted the power market for our GaN on silicon work. The power market is actually much larger than the GaN on RF market today. And that's one of the reasons why we targeted it first. And for the power market, we -- our big value that we've been talking about is to improve crystal quality and therefore, to allow people to manufacture on larger wafers because there'd be less ball and warp as they're growing the GaN and fewer defects and therefore, would have a lot of inherent value.

Now the only challenge with that is to validate all that work, you actually have to build wafers and build electrical devices and do a lot of testing. So that takes some time. And everybody's GaN growth properties are different. So there's some tuning that has to happen -- and so that takes time.

The new things I just mentioned, GaN on RF, we got some test data and we just spoke about it at a big compound semiconductor conference last week, and there is a huge amount of interest in the industry. And just looking at this early data that we got, it has to be validated and so forth. But just looking at that data could be enough for someone to adopt us because it's such a big breakthrough in such an area where the industry needs solutions. In RF, they don't actually have to do the full electrical testing before they can decide to move forward on something. So it could be that we're moving -- although we're earlier into the GaN on silicon for RF market, that one could move faster.

Okay. All right. Fair enough. One last question for me. And maybe going back to STMicro here, and I'm not sure if this is the -- who you're now referring to the IDM customer or not here. So maybe correct me if I'm misassuming that here. But maybe just kind of indicate where we're sitting here with those guys. Obviously, we have put a pause on the power stuff that you're hoping to move forward with that you talked about late last year. How about the other applications with them? Are they still moving as full force as you had expected and had been seeing since the cessation of the power work with them?

Yes. Just to clarify, when I talk about the IDM, it's not STMicro. STMicro is another IDM, and we think we have a lot of different areas that we can engage with STMicro, but that's a separate engagement. So yes, we've been talking with multiple business units over there and been doing some work, some evaluation work, and we have recently got some results that lead us to believe that we're going to start reengaging with them on developing a product. We aren't at the point where we can talk about that yet, and ST hasn't specifically given us any okay to talk about it. But yes, we've been saying since we had to give that unfortunate news about the BCD program at ST that we are working with other groups and that our relationship with the company was great. And the thing is they really know and understand MST technology and have seen it and they believe in it. So this is kind of an indication of those comments that we've been making and I haven't been able to announce a new deal with them yet, but we hope to be able to do that in the future.

Okay. There are a few questions that have been asked in the Q&A line, and I'll just bring them up one by one.

So the first kind of question is about gate-all-around and it's that given the evaluation periods that we've seen in other areas of Atomera, are there specific milestones that need to be hit to convert these gate-all-around customers into JDA? And what's a realistic time frame for such a conversion?

Yes. At a high level, I'll -- maybe I'll put a little bit more structure on what I showed -- I talked about Richard before. It's typical customers who want to see kind of 4 different levels. They want to see TCAD results that show that you have the potential to deliver performance, and they have to understand all the TCAD background and believe in it. Then they'll move ahead and say, we want to see that captured on silicon. So we've done those 2 steps and gate-all-around.

The next step, they say, okay, we want to see that captured in silicon, but on our silicon on our structure, we're going to send you guys wafers. We want you to deposit it on our structure and send it back to us, and we'll evaluate it. Now they know they're not going to get the most perfect performance out of that because the work we have to do together and tuning them up and getting everything to work fully integrated. But they're just trying to do a proof of concept on their platform, right? That's the stage we're at right now with 2 of the customers.

Beyond that, the stage after that would be where they install and do the actual implementation on their device, tuning it all appropriately. So yes, it's a fair question to say when should we expect to see a JDA sometime during -- in this period of us doing the evaluation on their devices and when we get to the point we'll install there because that would involve a license, then we should be having a JDA in place. These companies do not move fast when you're talking about kind of legal agreements. So -- but we're working hard to make those happen, and we hope to be able to announce them at some point in the near future.

Okay. And Frank, the question regarding the equity raise. An investor asked, he is curious about the background and reason for the third-party private placement. And given the stock price rise, was that -- could we have had better timing?

Right. Yes, thanks for that. One of the comments I've made in talking about the capital that we raised in Q1 was some funding that we got via the ATM. And if you look at that, the average price on that was $2.47, which is roughly about where we were trading about 1.5 weeks or 2 before we did the equity raise. And so the $5 price that we executed on there, given what we had seen so far, not only in Q1, but really looking back over the last couple of years, it made us look at this as a very good opportunity because, sure, the stock had run up to $7. And now in the last couple of weeks, it's run up again. But given the past trading levels that we had and again, a lot of geopolitical uncertainty in the middle of February, which we've kind of seen play out since then. Of course, you can't know how the equity market is going to perform. But on balance, it seems like a very good opportunity for us to execute on that.

And then frankly, be able to work toward commercial outcomes and not worry about the day-to-day movements in the stock price to have to use the ATM to keep our balance sheet strong. So we've now strengthened the balance sheet. It's always kind of easier with the benefit of hindsight to second guess the price, but I think it was a very good decision to execute then.

Question on the tool partner. How has your relationship evolved with your tool partner, the strategic partner? And are they giving you more engineering personnel? And how has that relationship changed over time?

Yes, that's a good question. We have been -- we try to be good partners with each of the big tool vendors. There's 3 main tool vendors that the industry uses for epi tools. And we typically want to be kind of an arms dealer work with whatever tool our customers want to work with. So we have good relationships with all of them.

The tool vendor that we have the strategic partnership with we've been working with for more than a decade, and had a good relationship with. But now that we've entered into the strategic partnership, the level of co-development work that we're doing is at a whole new level. So we have weekly meetings with their engineering team where we are working on developing the test data that we need for marketing to customers. And as customers ask us questions and want to get more demos, and we dig in and do work on that together. So yes, on an engineering cooperation level, it's at a whole new level.

The second area is on the marketing and sales to customers, and that's something that we've never really done with them in the past, and that's where we would be developing the right materials for us to both go into target customers and talk about MST technology and what a good solution that is. Now one thing I've calculated a number of times is that if we are successful licensing our technology to customers, in many cases, the tool vendor is going to make more money from us winning designs there than we will. So there's obvious advantages for them making us successful. And so they're not doing this out of the goodness of their heart. But the good news is, I think they've recognized that in the last year since we started this, and we're really seeing the benefit as we're engaging with customers.

Okay. And this is a follow-up kind of to the when moving of the gate-all-around customer -- engagement. But investor asked last -- commented that the last call sounded like 2026, we would see several deals being made. Is it safe to say that now that sounds unlikely? Or is there still hope for inking an agreement this year?

We're only in the fifth month of the year, and I'm hopeful every month that we're going to be inking deals. So definitely, we'd say there's definitely a very strong chance.

And if you look at all the areas in which you are working, which of the segments do you think is closest to producing a royalty-bearing license?

So I spoke a call or 2 ago about wafer-based products. And I think that the development effort in a wafer-based product is relatively easier. So some of the areas where we're offering wafer-based solutions are in gallium nitride and in RF SOI. And there's -- we have wafer-based solutions that we're offering in the memory space. So I think one of those could be the fastest. But we also have been working on power and on RF SOI with customers for a very long time. So those could also be quick time to market. It's very hard to call with so many moving pieces.

All right. And with that, Scott, I'll turn the call to you for closing comments here.

Okay. Well, I want to just thank you all for joining us to hear the progress being made within Atomera. I hope you're feeling the excitement that we are. Please continue to look for our news, articles and blog posts, which are available along with investor alerts on our website, atomera.com. Should you have additional questions, please contact Mike Bishop. We'll be happy to follow up. Thanks again for your support, and we look forward to our next update call.

Thank you. This concludes the call.

Hello, everyone, and welcome to Atomera's Fourth Quarter and Fiscal Year 2025 Update Call. I'd like to remind everyone that this call and webinar are being recorded and a replay will be available on Atomera's IR website for 1 year. I'm Mike Bishop with the company's Investor Relations.

As in prior quarters, we are using Zoom, and we will follow a similar presentation format with participants in a listen-only mode. We will open with prepared remarks from Scott Bibaud, Atomera's President and CEO; and Francis Laurencio, Atomera's CFO. Then we will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website.

Before we begin, I'd like to remind everyone that during today's call, we will make forward-looking statements. These forward-looking statements, whether in prepared remarks or during the Q&A session, are subject to inherent risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors section of our filings with the Securities and Exchange Commission specifically in the company's annual report on Form 10-K filed with the SEC on March 4, 2025. Except as otherwise required by federal securities laws, Atomera disclaims any obligation to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances.

Also, please note that during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website.

Now I would like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

Thanks, Mike, and good afternoon to everyone. In Atomera fourth quarter, we made great progress moving existing customers forward in our targeted segment, achieving very strong technical advantages, commencing new customer engagements in nontraditional areas and made our first foray into the world of government-funded collaborative developments, all positioning us strongly for commercial execution in 2026. Today, I will give you an update on all of our activities as we set the table for our business prospects in the new year.

Technology news recently has been dominated by the rapid advancement of artificial intelligence and the associated semiconductor challenges that AI entails from the allocation of limited GBU supply, the enormous stresses put on our energy infrastructure and the associated surge in memory prices. Atomera's technology is positioned to assist with each of these industry issues as we deliver materials, which help to relieve each pain point.

So let me start off with our recent exciting progress on Gate-All-Around transistor technology, which is the foundational architecture used in AI GPUs, CPUs and bleeding edge network components. The challenges with manufacturing these next-generation transistor devices at 2-nanometer and below are widespread and a concerted effort by the full ecosystem of industry players is required to manufacture them at scale with economically viable throughput and yield.

This has been the focus of our recently announced strategic partnership with a large equipment OEM. Target customers or TSMC, Samsung and Intel, who are in production and [indiscernible], a new Japanese manufacturer, which is deep in development. Atomera's MST technology delivers some very compelling solutions in this space, in particular, for diffusion blocking. These tiny Gate-All-Around on transistors require extremely high phosphorotoping levels constrained to a very small area in the source and drain of the nanosheet. Under the intense semiconductor manufacturing environment, it's difficult to keep these [ dopant atoms ] in their proper positions and just a small amount of migration into the channel can severely impact performance, efficiency and yield.

Atomera's MST is uniquely well suited to hold these roving phosphorus atoms in place. Although this MST characteristic is well proven in older technologies, implementing MST in devices that are around 2 nanometers, while maintaining its efficacy is something that industry players insist must be validated on silicon at real world scale, and we've been working hard to do so. Our target customers have been looking into two results to prove high-volume manufacturability. First, that MST can be effectively deposited into the actual nanosheet structure. And second, that the diffusion blocking characteristics are better than other methods, the industry is currently evaluating or using.

Obtaining these results is not straightforward and requires access to advanced structures that are not generally available are very expensive and frequently proprietary. But we've been able to make steady progress with the help of Gate-All-Around customer and our strategic partner. Just in the last month, we obtained very exciting silicon results in both targeted areas, which we believe provides the definitive proof to drive adoption of MST at all four of the world's Gate-All-Around customers in the future.

Not only can MST be deposited into those structures using existing tools and standard gases but it is a far superior diffusion blocking material than those currently used by the industry. We anticipate that we will be able to implement this technology with leading industry players over the next few quarters.

Of course, we're quite excited by these recent results since our advanced node, our Gate-All-Around business segment has extremely high revenue potential. But we're also making convincing progress in our other customer areas, so let me provide a short update there.

In DRAM, the technology road map is at a key inflection point as DRAM finally follows other logic and memory architectures in making better use of the vertical dimension. We are getting involved in offerings to enhance the performance of next-generation architectures in addition to solutions for products currently in production by the major memory suppliers.

During the last few months, we have had two major solution offerings that we're working hard to validate since their market potential is very high. Notably, these are both wafer-based solutions, which are easier to adopt and test, avoiding many of the integration complexities required in some of our other applications. And with the current robust market for memories, we believe our potential customers will have a generous R&D budget to pursue these ideas.

Atomera is currently conducting many wafer runs with our various customers. Most of these are processing through their fabs, so we will expect more information soon. One customer has just gotten preliminary results, which look promising. But we will get a better view when the final data is available in about a month. If the results look good, we'll be pushing for a joint development agreement and a license to advance this technology to production.

In the RF-SOI space, our offering is very strong, considering that it can provide performance improvements for multiple important areas, including for the RF switch and the low-noise amplifier. Because we are working with so many of the key players in this industry, including foundry and fabless suppliers, we hope to drive adoption broadly. Again, in this space, our solution can be implemented with a wafer-based solution, meaning our customers can choose to deposit it on wafers themselves before starting their full manufacturing process or they can even buy RF-SOI MST wafers from a third-party supplier. Our license structure supports both of these approaches.

In power, we are working with some very large players to ultimately be incorporated into their product offerings. Although we had a setback with ST last year, we continue to work with them on MST solutions across multiple business units. In addition to our traditional BCD business opportunities, this quarter, we had several other inbound interests emerge for power applications. Through our own internal analysis and modeling, we have uncovered an opportunity for MST entrench bets, which are an important component in optimizing energy efficiency in AI data centers. Our simulation show the potential for MST to improve performance by more than 40%. We got this to result after Christmas and already have a customer interested in kicking off development.

Similarly, using our MST [indiscernible] simulation capability, we have demonstrated how MST can improve HBT devices, which are high-speed transistors frequently used for amplifying and switching signals in RF communication systems. Discussions are underway with a potential first customer in this application as well.

In GaN, I'm happy to report that our first customer -- commercial customer has now started running wafers for GaN on silicon with MST technology. For many reasons, this is exciting. This large customer can grow their own GaN wafers and manufacture electrical devices on them, which means they can move even faster than our in-house work with Sandia National Labs in Texas State. So we expect that we will actually move ahead of our own internal development efforts over the next few quarters.

Second, they are exploring GaN in both RF and power technologies. These independent efforts by multiple industry and scientific partners frequently can accelerate time to revenue, which is what we're hoping to accomplish. Last month, we announced that our GaN on Silicon concept paper had been approved to move to the proposal stage for a project with Power America to advance the state-of-the-art and wideband GaN materials.

We announced this for a variety of reasons. First, we wanted to show the widespread interest from customers, the science community and industrial organizations for an MST solution for GaN on Silicon. Indeed, we've already received several letters of support for multiple future customers showing interest in this solution. Second, this concept paper was our first application for outside development funding. And although the funds sought for this first effort are modest, they put us in the pathway for a variety of future material development funding opportunities, which can provide us assistance going down the path we are planning to travel anyway. By engaging in these joint development opportunities, we are promoting our technology, receiving financial assistance and assuring a customer base all in one project.

To summarize, the past few months have been an incredibly productive time in terms of technical development and the buildup of a variety of new customer opportunities that I believe will lead to business deal announcements later this year.

Finally, as we close out 2025, let me give you a thought on -- a few thoughts on our accomplishments. Last year, we took our early development and simulation results on Gate-All-Around and converted it into what I now believe is our greatest company opportunity. We did that through working with a lead customer and with a strategic partner who is also a major equipment OEM. This is a significant departure from how we've approached the market in the past. The industry has a long history of relying on this OEM to deliver them material solutions for their problems. So we truly believe that their influence will help us to convert our recent strong technical results to licenses and revenue.

We made technical breakthroughs in our other core markets to enable tiller applications like LNA for RF-SOI, a new architecture for BCD and next-gen DRAM solutions. Using AI, our development team has gotten better results more efficiently than ever before. We kicked off a record number of wafer runs without leading customers, initiated several new projects and solidified the business talent on our team, which should lead to further contract announcements over the course of this year. And much of this work was done, emphasizing wafer-based products, which we believe will result in faster time to revenue. In short, 2025 efforts have set us up well for commercial announcements later this year.

With that, I'll turn the call over to Frank to review our financials.

Thank you, Scott. At the close of the market today, we issued a press release announcing our fourth quarter and full year results for 2025. This slide shows our summary financials. Revenue in 2025 was $65,000 and consisted of NRE fees for wafer deliveries and MST CAD licensing. Our GAAP net loss for the year ended December 31, 2025, was $20.2 million or $0.65 per share, compared to a net loss of $18.4 million or $0.68 per share in 2024. On a non-GAAP basis, 2025 net loss was $16.1 million or $0.52 per share. And 2024 net loss was $15.4 million or $0.57 per share.

GAAP operating expenses were $20.9 million in 2025, which was an increase of approximately $1.5 million from $19.3 million of GAAP operating expense in 2024. The main driver of the increase in GAAP operating expense was a $1.1 million increase in stock compensation expense due to a change in our executive equity-based compensation.

In Q1 2025, we implemented PSUs for executives which vest based on the performance of our stock price as compared to the Russell 2000 Index. These PSUs vest over 3 years whereas the options and time-based RSUs that had been granted to executives in prior years, vested over 4 years. Although the vesting period is shorter, executives only vest in PSUs based upon our stock price performance.

With the exception of stock compensation expense, the drivers of GAAP and non-GAAP expenses are substantially the same. And therefore, the rest of my remarks will only refer to non-GAAP results. Please refer to the slide presentation for a reconciliation between GAAP and non-GAAP expenses.

Total operating expenses in 2025 were $15.9 million, an increase of $429,000 from $15.4 million in 2024. R&D expenses increased by $794,000 from $9.4 million in 2024 to $10.2 million in 2025, primarily due to a $676,000 increase in outsourced engineering as we utilize various new device fabrication vendors replacing TSI semiconductor.

G&A expenses decreased by $272,000 from $5.1 million to $4.8 million, primarily due to a $421,000 decrease in compensation expense, offset in part by $118,000 increase in professional fees for legal, IP and audit fees.

Sales and marketing expense decreased by $94,000, reflecting lower head count but offset by some recruiting fees.

Company-wide, our compensation expense, again, on a non-GAAP basis, excluding stock compensation, declined by $582,000 in 2025 compared to 2024. The reduction in compensation expense reflects our Board's pay-for-performance discipline. While we achieved important technical milestones in 2025, the Compensation Committee determined that payout of the full executive bonus was not justified by commercial progress made during the year. Therefore, the committee withheld approximately $669,000 in executive bonus compensation affecting the full executive team. The withheld amount may be earned in 2026, based on achieving rigorous commercial objectives.

Turning to our quarterly results. Fourth quarter 2025 non-GAAP net loss was $3.3 million or $0.10 per share, compared to a net loss of $4.4 million or $0.14 per share in Q3 and a net loss of $3.9 million or $0.14 per share in Q4 2024. Non-GAAP operating expenses decreased by $1.1 million to $4.3 million -- sorry, from $4.3 million in Q3 2025 to $3.2 million in Q4, primarily due to the reversal of our bonus accrual, which occurred in Q4.

Our balance of cash, cash equivalents and short-term investments on December 31 was $19.2 million compared to $26.7 million at the end of 2024 and $20.3 million at the end of Q3 2024. We used $14.9 million of cash in operating activities during 2025, $3.2 million of which was used in Q4.

During 2025, we sold approximately 1.6 million shares under our ATM facility at an average price per share of $5.15, resulting in net proceeds of approximately $7.6 million after commissions and offering expenses. As of December 31, 2025, we had 32.4 million shares outstanding. After year-end, we've raised an additional $3.2 million of net proceeds by selling approximately 1.3 million shares at an average price of $2.47.

For Q1, we expect to recognize revenue in the range of $50,000 to $100,000 from shipment of MST wafers to customers. Consistent with our usual practice, we are not providing revenue guidance beyond this quarter.

Our 2025 non-GAAP operating expense was $15.9 million, which is well below the guidance range I provided last quarter. That's primarily due to reversing $669,000 of accrued bonus. For 2026, we will continue to aggressively control costs, and we've limited our expense growth to those areas directly related to revenue and near-term commercial progress. Those increases mainly consist of adding two senior go-to-market leaders. The first of those was our VP of Sales, who came on board in October, and the next will be a new Head of Marketing.

The comparison of our planned spending in 2026 versus 2025 looks distorted by the potential payout this year of the executive bonus withheld from 2025. And because withheld amount will have to be accrued this year on top of accruing 2026 bonus. As a result, we expect our non-GAAP operating expense to be approximately $18.5 million in 2026.

Now on paper, this is a 17% increase. But if normalized for the timing of the executive bonus accrual, it is more in the range of 8%. I would point out also that earning back deferred executive bonuses as well as earning 2026 bonus will require us to execute against aggressive, commercially focused milestones.

With that, I will turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott?

Thank you, Frank. The entire focus of our efforts in 2025 is getting to commercial agreements. The work we've done up to now have positioned us well to close on those opportunities and I look forward to sharing our successes with you as the year progresses. Mike, we will now take questions.

[Operator Instructions] And right now our first question comes from Richard Shannon of Craig-Hallum. Richard, go ahead.

Great, Mike. Can you hear me?

Yes. Yes, we can.

Okay. Great. I'm in the airport here. A little bit of noise, so apologies for that. I don't have a ton of time before I got to run to my plane here. But let me ask just a few questions here. Scott, some really interesting statements regarding Gate-All-Around here. If I caught your comments correctly here, you said that you're expecting some -- I forgot the exact language you used, but some sort of important next steps here in the next few quarters. typically, you've been reticent to give somewhat definitive time frames for getting to major milestones and that you are here.

So maybe give us a sense of why you're saying this. Your confidence level is clearly quite high. So help us understand this level of confidence and why?

Yes, I would say on the Gate-All-Around technology, let me -- do you mind if I just share this slide to answer your question, Richard?

Please do.

Okay. On the right-hand side, you can see where MST is deposited around the source and drain structures. That is an incredibly hard thing to do. We've been talking with our Gate-All-Around customers about using MST to block dopant diffusion like where these little red arrows going to 1 of the biggest problems that people have is that the phosphorus opens get into these channels here. And the channels can only handle a couple of phosphorus atoms before they really start to agree very significantly, which affects yield and performance and so forth.

So all along, they've been saying, okay, that's interesting. We know MST can block the phosphorus. But first of all, can you even deposit it in these tiny little structures that are -- they're 2 nanometers. And just to give you an idea, it takes about 100,000 nanometers to get to the width of a hair. That's how small these are. And so we had to prove that, and we spent a long time in the lab building devices like this to show that we can deposit MST with high quality there, and we have done that.

Second thing is when we put that tiny layer of MST, does it really still block the phosphorus in that very, very small space because they're using something else right now that isn't very effective at blocking it, but are we better than that of the thing? And the answer to that question is, yes as well. We've recently just gotten the technology -- gotten the test data to prove that.

And so it's early days. We've gotten that in the last month. We haven't been able to get out and talk to each of the data all around customers yet, but with our partnership, with our strategic partner, we really think we're going to talk to those guys, and they're going to immediately want to start testing that and trying it. So I'd say that's why my confidence is much higher. I would say we've rarely been as excited about some technology results inside the company as we are by what we have right now.

Okay. Great deal. I'm sure I'll follow up a little bit on that one. Second other -- second question here is, you mentioned some -- you mentioned two things you have to prove, you are better than alternative solutions. We haven't really heard you talk about what other -- what your potential customers are considering here. Any way you can describe what those are, whether they're internal developments or something looking from other research organizations and to what degree you have visibility into how well those are doing as well?

Yes. So they're not -- we're not really talking about some lineup of other technologies. But what the industry has tried using in the past is silicon arsenic, and silicon arsenic is effective at just putting a spacer between the phosphorus and the channel, but it doesn't really prevent the dopant diffusion very well at all. And so we've actually done a lot of testing of our MST technology against silicon arsenic and proven that we have vastly better diffusion blocking results.

And the second thing is that the industry does not like to use arsenic in its manufacturing process -- that can help it. It's expensive to use and dangerous and therefore, offering a solution that removes that material is probably considered good by the industry.

Okay. Fair enough. Very interesting here. My last question before I've got to run here, Scott, is you talked about a number of inbound calls here in the power space, which I know it's a space that you've been pushing for a while. And obviously, STMicro was aiming towards that before it's, call it, set back. You'd characterize this in the RF-SOI space a few years ago about having significant coverage, I think, more than half of the market share of the space here. Anyway to characterize how much of the power space you're covering with -- when you add up all these new companies that are coming to you? Any way you'd characterize that?

Yes, it's a little bit harder. I think on RF-SOI, it's a pretty compact group of companies, and we feel very confident that we're working with the vast majority of them. On power, it's a much bigger market. It's a much more diverse customer base. So I wouldn't say we're working with most of the people, of course, -- we -- like we talked a little bit about the work we've done in TrenchFET when we did do some work on TrenchFET. We reached out to the leaders in TrenchFET and some other folks that we know are interested in advancing their technology and started talking to them and that worked well and the same thing with HBT.

And so yes, I think we're expanding -- and then a lot of the GaN work that we're doing is in power as well. So we're talking to a lot of companies working in the power space, but I can't really give you -- I can't really say it's the vast majority in that case.

I wasn't expecting the vast majority, but since the power space is very large. Well, I thought if there was -- I mean, if you even had 10% or 20%, that would be a pretty good coverage there. But I appreciate that characterization. I've got to jump out of line, Scott.

All right. Thank you, Richard.

All right. Thank you, Richard. We have some questions coming in on the Q&A line. Although I will start with one, Scott, do -- can you give an update on the progress for your Vice President of Sales, Wei?

Sure. Wei joined in October, and he's been coming up to speed and generally very, very helpful. I'm super enthusiastic about having someone who's pushing the team as hard as he is on the sales side. He's not only driving our efforts very specifically with existing customers and helping us find some new ones. He's also targeting a bunch of relationships that he's had in the past that he's bringing in with us and that does allow him to -- for us to engage with customers from kind of a different angle, and that's been very positive. So I think so far, so good.

Great. And a number of questions about wafer activity at the fab. And as it relates to general activity level, how would you characterize that?

Yes. So I think just starting earlier in the middle of 2025, we started to get a lot of customers coming in with wafer run simultaneously, which is quite busy for us to get them into our fab and deposit MST on a very high-quality basis and they get it back out, so they can start running the wafers. Today, we're still running things in our own fab, but for the most part, we've shipped out a lot of that stuff out to our customers.

And now we're kind of in a waiting game, it takes 6 to 9 months for customers to run their wafers once we send them back to them and then get the test results, and then we'll review those and we'll figure out the next steps from there. But we really feel confident that what we have done in these runs is good stuff. We use MST CAD simulation software to figure out what we expect the outcome of these runs to be and we're really hopeful that our TCAD has been accurate. And if we get the results that we hope for, that our customers want to move forward into a productization effort.

Okay. And generally speaking, I have a question here, and I think we've covered it on prior calls, but can you describe why selling blank wafers makes it easier to go to market?

Yes, absolutely. Okay. I just showed this graphic of a Gate-All-Around device, and that is a really, really hard device to integrate into. But you can imagine when -- if we're trying to integrate into that device, the customer starts a starting wafer, they build up a whole bunch of structures. And then at some point, they make a hole in those structures and they say, okay, put your MST in here. And then we'll have to figure out how to fill around it and all of the different layers that surround it affected, right? That's called integration engineering, it's very challenging.

But for many of our applications, we talk about wafer-based products, that would be when the customer buys a wafer, and they put MST on immediately, the blank wafer. And then they start processing their -- all of their -- the rest of that process on top of it. Therefore, we don't have to work through all those challenging integration issues that we would have for something that where MST gets deposited in the middle.

So today, I talked about a couple of applications we're looking at for DRAM that would be wafer-based products, where we're shipping them to wafer. I mean, obviously, we won't be wafer manufacturers, but we would help the most solution that would go right on the wafer. RF-SOI, our solutions that are wafer-based products and also our gallium nitride, our GaN solutions are wafer-based products. So we've talked about it before. We're excited about those because they're easier to integrate, and therefore, we think faster time to revenue.

Okay. Great. Here's another one. Can you please explain more about power saving in AI than how MST can help achieve that?

Yes. So it's a lot of ways. I just showed you the Gate-All-Around transistor. So fundamentally, in semiconductor manufacturing like that, if you can bring a performance improvement, you could also probably trade that off to get lower power if you chose to do so. So that's one way.

Another way is with our power solutions like on our BCD products or our TrenchFET products or our GaN products. Those are targeted for the type of electronics that will be developed that go into AI data center to help lower the power in the racks.

So I'll give you one industry dynamics that we're tracking in AI data centers. They have historically used a 12-volt power supply on the rack. But recently, the industry is moving away from 12 volts and they're moving to 48 volts because 48 volts is 4x more efficient at saving power when you're providing power to the racks for all of those servers. The 48-volt power supplies use a lot of TrenchFET devices. That's the primary device that they use in there. And so we are trying to offer solutions for TrenchFET, so we can help to address that.

The other thing is gallium nitride obviously, a very power-efficient devices. Those of you who have the small power supplies that go into your backpack or suitcase like they weren't able to do before you understand that those are much more efficient, and that's why we're trying to engage in gallium nitride.

Interesting. Thank you. Okay. Can you give us an update on your JDA1 and JDA 2?

Yes. So and JDA 1, I have to be careful that I'm not kind of divulging too much about what they're working on. But we continue to have to be working with JDA 1, and I'm hopeful that some of the technologies that I talked about today will kick them into high gear to -- in a business unit to kind of move that forward towards a production development effort like we've been waiting for, for -- honestly, for a little bit too long. JDA 2 is one of the customers that is currently running wafers with us. And so I can't say too much about exactly where they are right now, but they're running wafers.

Great. And going back to the Gate-All-Around, is MST being evaluated at the customer's fab at this point?

Yes. So we mentioned that we're working with one Gate-All-Around customer today who helped us -- so when I showed that structure, and I showed that we had to do deposits inside there, you really need to work with someone to get access to those wafers to try out things on those structures. And the good news is we have been working with one of the Gate-All-Around potential customers to evaluate MST today. So yes, we are in one of them. I hope to be in all four of them.

Okay. And when do you expect an evaluation to be completed of the wafers.

For Gate-All-Around or?

Yes. For Gate-All-Around.

For Gate-All-Around, it's very hard to say with some of the customers we're planning our visit to show them all this data that we have. We believe that the data that we have is good enough that they may not even require us to do deposition inside their Gate-All-Around structure because we've proven that we can physically do it. And then what we'd be trying to do is to convince those customers to install MST in their fabs and have their R&D team take over and start implementing this.

How fast that will happen? It's hard to say, but I will say the people that are working on Gate-All-Around are working very fast -- and if they adopt, they're going to be pushing us as hard as we ever been pushed by a customer in the past.

Okay. Great. And just one last question here is on how MST can help or improve quantum computing.

It's interesting. That's something we're working on right now. I don't really -- I can't really talk about the way that our MST technology will address quantum, but I can tell you that's something we're working very hard on right now. In the past, we had a theory about MST's ability to improve the purity and availability at a cheaper price of Silicon-28, which is a critical wafer type that's used for quantum wells. But we -- yes, that really just didn't pan out. So we're working on other technologies right now. And I hope we'll be able to talk to you guys about that later this year.

And Scott, you can proceed with any closing comments.

All right. Well, I guess -- I want to just thank you all for joining us to hear the progress being made here at Atomera. Continue to look for our news, articles and blog posts, which are available along with investor alerts on our website atomera.com. Should you have additional questions, please contact Mike Bishop, who will be happy to follow up. Thanks again for your support, and we look forward to our next update call.

Thank you. This concludes the Atomera Fourth Quarter Conference call.

Hello, everyone, and welcome to Atomera's Third Quarter 2025 Update Call. I'd like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera's IR website for 1 year. I'm Mike Bishop with the company's Investor Relations.

As in prior quarters, we are using Zoom, and we will follow a similar presentation format with participants in a listen-only mode. We will open with prepared remarks from Scott Bibaud, Atomera's President and CEO; and Frank Laurencio, Atomera's CFO. Then we will open the call to questions.

If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website.

Before we begin, I would like to remind everyone that during today's call, we will make forward-looking statements. These forward-looking statements, whether in prepared remarks or during the Q&A session, are subject to inherent risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors section of our filings with the Securities and Exchange Commission, specifically in the company's annual report on Form 10-K filed with the SEC on March 4, 2025.

Except as otherwise required by federal securities laws, Atomera disclaims any obligation to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances.

Also, please note that during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website.

Now I'd like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

Thanks a lot, Mike, and good afternoon, all. This has been a quarter of both challenge and validation, one that underscores the reality of bringing a new material technology to market and the opportunities that come when you solve fundamental problems for the semiconductor industry. I'll start by addressing our update with STMicroelectronics and depart from our regular format to review the broader picture, the momentum we're building with new customers and the different market opportunities that Atomera's technology is being used to address.

As many of you have seen in our announcement, our work with STMicroelectronics on their smart power platform reached an inflection point this quarter. During this program, we were tackling a very difficult performance trade-off for their 200-millimeter platform. We achieved what we set out to do, significant performance improvements in key device metrics. However, that higher performance came with a corresponding reduction in device lifetime, often referred to as reliability, which failed to meet all of ST's specifications.

Over many months, our 2 teams worked closely to resolve this trade-off. Then ST, as part of a reshaping of its manufacturing footprint, announced they would discontinue development on 200-millimeter wafers to focus exclusively on 300-millimeter for the next-generation BCD110 platform.

At about the same time, Atomera discovered a new MST implementation validated through our TCAD simulations that doubled our performance improvement without the associated reduction in device lifetime. In other words, we found a way around the trade-off, and improvement only made possible by using MST.

Over the last few months, ST validated our findings for the new implementation. However, because this new version required a device architecture change that would take multiple learning cycles to validate, they determined that they could not incorporate it and still meet their aggressive BCD110 launch schedule. Therefore, ST informed us that they will take BCD110 to market without MST, and currently, they have no plan for a future variant that includes it. That means we no longer have a line of sight to royalty revenue at ST for this particular program.

While that outcome is certainly disappointing, there are several important positives I want to emphasize.

First, at STMicro, we demonstrated significant performance gains and proved MST's integration capability inside a Tier 1 production fab.

Second, we've now developed a very high-performance solution that eliminates the performance reliability trade-off, which is a significant new differentiator for us going forward, one that we are already actively discussing with other players in this market.

And third, ST has reiterated their intent to continue working with us in other technology areas where MST could add value. Under their license with us, they continue to run experiments across several different businesses.

This chapter with ST underscores that moving a new material into mass production is rarely linear. But the learning from this effort makes us a stronger -- gives us a stronger foundation as we engage with others in the same power market segment, including with a very large existing customer and even a new engagement that began this past quarter. Customers are now evaluating MST for power devices between 5 volts and 48 volts. It's important to keep in perspective that ST is only one of many large customers we are working with today to take MST into production in the power area.

We also have 3 other very active technology focus areas. In the Gate-All-Around space, there are 3 large competitors and one that's still emerging. We're working with or in discussions with all 3 of them. I mean, all 4 of them. In the DRAM space, there are 3 large manufacturers, and we are engaged with 2 of them right now and have good relationship with the third. In the RF-SOI area, we're doing integration work with 4 different fabs and a fabless player right now with many of them running wafers. So you can see that we have no lack of opportunities across several different segments. Indeed, during the last 3 months, we processed a record number of wafers for our customers.

When we look at all these opportunities, it's helpful to understand how we prioritize our business in terms of revenue potential. The first being the fastest time to market, second being the highest return on investment and the third being breakthrough long-term growth. One of the fastest ways to get Atomera's technology to market is through applications which use MST deposited on top of the starting wafer rather than inserted into the middle of the manufacturing line.

There are many reasons why this can accelerate revenue. First, customers can simply acquire an MST starting wafer and run it through their standard production flow with very few process modifications for an easy experiment. They don't have to install MST, deal with the complications of wafers being transferred in and out of their fab, make major changes to their process to integrate it or complete a license agreement.

The price of MST can be built into the cost of the starting wafer, which gives Atomera the same revenue, but the customer will not view the cost as a royalty. And it's certainly faster to get MST starting wafers qualified than something integrated into the middle of the process. Today, we use MST starting wafers in our work in RF-SOI, in GaN and possibly soon in next-generation DRAM. We actively seek out these implementations because of the relatively easier integration and shorter path to revenue.

The second set of applications have enormous revenue potential, but the development process can be more demanding because MST is inserted into the middle of a complex set of production steps. It is worth it, though, because the upside represents a massive return on investment, including in the areas of Gate-All-Around logic, DRAM, power devices and other memory products. One design win here will ensure the future success of the company. And as I mentioned earlier, we have at least 6 or 7 of those efforts underway today.

In Gate-All-Around and advanced memory, our partnership with a leading capital equipment company announced earlier this year is showcasing our competence at advanced nodes. Using their test infrastructure, we've been able to validate MST's ability to reduce contact resistance, improve channel reliability and be deposited in the tiny structures of nanosheet transistors.

We are very excited by the deep cooperation and customer interest generated through this partnership. This quarter, we'll be hitting the road on joint visits with our customers to persuade them that issues in their manufacturing process can be solved using MST. The weight of our partners' endorsement cannot be overstated.

Finally, we have an abundance of new breakthrough materials enabled by MST under development in the background through commercial partnerships and university collaborations. For many of them, we've already filed fundamental patents, and we're now in the process of making prototypes and understanding their capabilities. This is the type of program, for instance, which launched our GaN work.

We have a dozen similar initiatives in early investigation, several of which might become near-term disruptive technology announcements in areas like quantum computing, AI server power, high-bandwidth memory architectures, piezoelectric devices, optical networking and a variety of other areas, which have the potential to enable entirely new applications.

Farming out the early R&D whenever possible, allows Atomera's core team to keep a laser focus on the nearer-term revenue opportunities and apply more resources only when we see the potential of these innovations coming to fruition. Our gallium nitride initiative continues to deliver exciting progress. In collaboration with Sandia National Labs, we're in the process of completing device fabrication to highlight our improved electrical performance.

Prior results have confirmed MST's ability to enhance GaN growth on silicon substrates, a major barrier for high-volume production and have garnered interest from our first commercial customers. We hope to release a complete data set publicly later this year, which will be the precursor to a full-scale rollout. As we continue our GaN work with Sandia, they are now seeking to expand the areas of R&D engagement on a range of Atomera technologies corresponding to their highest priority development areas.

The semiconductor industry is clearly entering a new materials innovation cycle. Across logic, memory, power and RF, engineers are hitting the limits of conventional scaling. They're searching for material solutions that can boost performance, improve reliability and reduce variability, exactly where MST delivers value. This is particularly true in AI infrastructure and data centers, where the demand for power efficiency and thermal management is driving renewed focus on device-level innovation, which MST can deliver.

One of our principal challenges is to ensure that potential customers know about MST -- and that is why I'm so excited to welcome Wei Na as our new VP of Sales. Wei has had experience growing a semiconductor technology licensing business very much like Atomera from scratch, selling to the exact same customers we are addressing, and we believe his leadership will help us both grow sales and convert existing opportunities into licenses.

Our priorities remain clear: emphasize MSD starting wafer products like RF-SOI and existing engagements to get to production and revenue as quickly as possible; 2, leverage our strategic OEM partnership to advance active engagements in Gate-All-Around logic, memory and power through our comprehensive silicon test results and early licenses; 3, bring MST for GaN technology to a customer-ready stage with shareable electrical data; and 4, maintain fiscal discipline as we transition from R&D validation and integration to revenue-generating licenses.

Our mission hasn't changed. It's to enable better, faster and more efficient semiconductors through advanced materials engineering. That mission remains as relevant as ever. I want to thank our employees, our customers and our shareholders for their continued confidence and support. Every quarter, we move closer to the point where MST's impact will be felt across multiple product lines and foundries worldwide.

With that, I'll turn the call over to our CFO, Frank Laurencio, to review our financials.

Thanks, Scott. At the close of the market today, we issued a press release announcing our results for the third quarter of 2025. Our summary financials are shown on this slide.

Our GAAP net loss for the third quarter of 2025 was $5.6 million or $0.17 per share compared to a net loss of $4.6 million, which was also $0.17 per share in Q3 of last year. GAAP operating expenses in the third quarter of this year were $5.7 million, an increase of $857,000 from $4.8 million in Q3 of 2024. This was due to a $544,000 increase in R&D expenses, reflecting both higher outsourced device fabrication work and increased compensation expenses and the $353,000 increase in G&A expenses, primarily consisting of higher stock compensation expense.

Sales and marketing expenses were basically flat. Non-GAAP net loss in Q3 2025 was $4.4 million compared to a loss of $3.9 million in Q3 of last year due to a $423,000 increase in non-GAAP operating expense, primarily reflecting the higher R&D expenses I just discussed.

Stock compensation expense, which is the main difference between GAAP and non-GAAP operating expenses was $1.3 million in Q3 of 2025 and $907,000 in Q3 2024. The increase in stock compensation expense, which is noncash, reflects the adoption of performance-based RSUs or PSUs for executive equity-based compensation in March of last year. PSUs vest over 3 years rather than 4 years as is the case for time-based RSUs. However, PSUs will only vest if we deliver shareholder returns that meet minimum targets relative to the Russell 2000 Index. Sequentially, Q3 2025 non-GAAP net loss of $4.4 million compares to a $4 million net loss in Q2, primarily due to higher R&D expenses.

Our balance of cash and cash equivalents as of September 30, 2025, was $20.3 million compared to $22 million as of June 30, 2025. We used $3.4 million of cash in operating activities during Q3 compared to $3.5 million in the second quarter of this year. During Q2 -- sorry, during Q3, we raised approximately $2 million under our ATM facility, net of commissions and expenses by selling approximately 393,000 shares at an average price of $5.23. Since the end of the quarter, we've raised an additional $836,000 from sales of approximately 171,000 shares at an average price of $5.03. As of today's date, we have 31.7 million shares outstanding.

In Q4, we expect to recognize between $75,000 and $125,000 of NRE revenue from wafer shipments to customers running the demos that Scott mentioned in his remarks. Those shipments and the associated revenue recognition will happen in Q4 as well as into next year. Gross margin was negative this quarter because a portion of the cost for MST deposition on those wafers was incurred during this quarter, but the revenue will be recognized as we ship the wafers going forward.

Moving to expenses. I expect our non-GAAP operating expense for the full year 2025 to be in the range of $17.25 million to $17.50 million. Sales and marketing expenses ticked up last quarter in connection with recruiting for both sales and marketing leadership roles. The compensation expenses associated with those roles are built into our plan. Our recruiting efforts have started to pay off with the hiring of Wei Na as our VP of Sales.

With that, I'll turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott?

Sorry, a little trouble with the Zoom controls here.

Thanks, Frank. Across all of our technology focus areas, we have strong developments underway with the leaders of the industry. I hope today, we've given you a sense of our wide and deep potential to deliver important material solutions that will ultimately make Atomera a financially successful technology provider across many different semiconductor segments. I appreciate you taking the journey with us.

Mike, we will now take questions.

All right. Thank you, Scott. [Operator Instructions] Right now, our first question comes from Richard Shannon of Craig-Hallum.

All right. Great. Hopefully, I'm unmuted here, Mike.

You got it.

All right. Excellent. Thanks Scott and Frank, let me ask a few questions here. Scott, maybe let's do a redux on STMicro. So I guess my first question here is, so it sounds like you did a new design on 300 millimeters that you validated in your simulations, but there would have been multiple cycles of learning to validate for ST. So is that trying to match your simulation to the real world to their simulations to make sure that it worked, and that cycle time was just too much to fit within their time frame getting to 300-millimeter. Is that the kind of the dynamic here that led them to their decision?

Yes. So first of all, the work -- the new implementation we came up with would have worked on 200-millimeter or 300-millimeter. And actually, if you let me digress one second here, Richard, because we've gotten a number of questions that have come in where people were asking, when did you know about this trade-off between the reliability and performance.

Every time you do a development, it's about trade-offs. You're doing a trade-off on one thing -- I mean, you get -- that's why we always talk about cycles of learning. You get some big improvement in one area, it breaks something else. And then you have to go in and you have to work to fix the other thing and try to get to a point where it's all balanced out. So this trade-off work that we were doing is not at all unusual. It's what we do with every customer all the time.

What is unusual is that because they made the transition from 200 to 300, (sic) [ 200-millimeter to 300-millimeter ] we lost the ability to bring in that ultimate solution and get it done for them in time because the 300-millimeter delayed their development efforts and then they needed to get into production fast, and so they just didn't have time to run the validation runs to get our new thing proven out. I'm not sure that answered your whole question. Let me know.

I guess the point here is that it sounded like they were confident that this solves not only the performance, but the reliability issue that you discovered in 200-millimeter, and it was just the time frame that was too tight for them to want to continue right now?

Yes, that's right. Originally, you asked about the simulation work. So we do simulation based on what we believe a customer's process -- manufacturing process is, but that's usually very secretive. They don't give anybody that information exactly. We can make our best approximation. And so we made a TCAD simulation that showed, yes, we really got this great improvement. And we gave it to them in this summer.

And then they spent the next 2 months running their own simulations. Their simulations are very exact to their own manufacturing process. And so what they did was they put in all the improvements we saw -- we proposed. And they came back and they said, "You know what, when we run our simulation, it also brings that level of improvement." So ultimately, I mean, the good news here is that they confirmed it. It makes us feel very confident to bring it out into the market as a new product. And it also makes us confident that at some point in time, we're hopeful we can reengage with ST on that particular product and have them take it forward and make it -- put it into their process.

Okay. All right. Fair enough. Let me follow up on one other comments you made related to STMicro and then we'll move on to some other topics here. So what seems obvious and you just commented on is the ability to take some of the learnings from the process with ST and take it to other customers in the power space here. What have you been able to do so far? Can you use similar kind of structures that you've built with ST and use those with other power customers? Maybe just kind of give us a sense of the benefits you can see from the situation.

Yes. Exactly. So what we did with ST, there's a technique and architecture that the industry has known about for some time, but it hasn't been implementable. When someone builds it, it causes too many things to break and nobody has ever been able to get it to work. But because of the way MST works, because of the way it prevents dopants from diffusing uncontrollably, we believed that we could get that process to work. So this is not like something no one's ever heard of. It's something that -- one of those theoretical things that no one has been able to get working well and now we can get it to work well.

And so yes, it's -- we're not taking anything from -- any proprietary ST information. This is like a standard design technique that we can suddenly make work because of MST. And so yes, we can take that out to other customers, and they kind of understand the concept immediately.

Okay. All right. Fair enough. Let's move on here. In the last number of quarters, you've talked about transformative customers here. And unless I missed something, you didn't necessarily use that phrase here today in your prepared remarks. But I think you did mention a large demo run, which I think refers to one of them. And I think is also contributing to some of the revenues this year. I will ask a question to Frank on the revenue side here in a second here. But maybe just kind of detail where we're sitting with the transformative customers.

And I do want to hit on one specific point that I had a question on. I actually asked Mike Bishop offline earlier today, and he said to ask this question of you, which is you've talked about 2 or maybe 3 of these customers. I want to make sure how many we're talking about and which ones are still ongoing versus any ones that may be stalled. So if you can enumerate that first and then discuss what's going on with this large demonstration you talked about last quarter, and I think you briefly mentioned today, that would be great.

Okay. Yes. I know everybody is frustrated with the code words, and I am too. But we -- so in January or February, we unfortunately had to announce that one customer that we had called transformative had discontinued our -- we were negotiating a deal and they had backed out of the deal. And that customer, we continue to have good relations with them. We talk with them regularly, but we are not on an active engagement with that customer right now.

In that same call, which I think was early -- was in February. We mentioned 2 new transformative customers that were getting underway. And yes, we are working very actively with them. When we talked about a record number of wafers that we're processing, it includes those 2 customers that we call transformative back then.

And so now today, I mentioned these 4 different segments and how we're working with a lot of customers. And then I broke it down by revenue potential and the folks in the middle, folks that are doing Gate-All-Around, folks that are doing DRAM, there are really big players who are doing power and other memory architectures. They are all massive and they're all customers that I would call transformative and so we are -- we're working with more than just those 2 that I mentioned on the call.

More than just the 2 that you would refer to as transformative. Is that what you're saying, Scott?

Yes, yes.

Okay.

I mean I -- just discontinue the term transformative. [ We're good. ] These 2 customers I spoke about as transformative in February are just very, very large revenue potential customers with very big processes that we hope to get going on. But we're also working with other customers who are also very large and have the potential to be transformative.

Okay. Well, let's talk about the specific transformative customer you talked about last quarter that you're doing a large demo run here. What's the update on what's going there? And is that leading to at least some contribution to the revenues you're guiding to this quarter?

Yes. Maybe I'll let Frank answer that. But -- so one of the -- there's some trickiness about when we book revenues. And so we have a lot of customers. The revenue that we're putting out this quarter is based on several customers. I can't answer whether that specific one is in Q3 or it will be in the guidance that Frank gave for Q4, but it's -- yes, we're getting revenue from wafer runs with that customer.

Yes, that's right. I mean, the revenue guidance actually covers multiple customers, 3 different customers. And it's spaced out over time. And while I don't like to show negative gross margin, the timing issue gives a little bit more visibility in the sense that we do a bunch of the deposition work, which is when we incur the cost of our tools, the metrology and the labor associated with it. And oftentimes, these are -- these can get matched up pretty quickly with the revenue because it's a small number of wafer runs, and that's been true in the past.

But we've been talking now for a couple of calls that we've been working with a very large customer on one of the largest wafer -- on the largest wafer run that we've ever done. And we also have other customers. So now what you're seeing is, we do a lot of that work we don't ship all of those wafers out, but we don't necessarily do all the deposition because the nature of these engagements is it can be iterative.

You may do some wafers for setup, you run a series of tests, the customer validates those, you get some feedback. You then do another run with slightly different conditions, either on the MST or how the customer processes it with implants and things of that nature. So you can get a lot of activity in 1 quarter and then the wafers will ship out over time.

And one of the challenges in sort of giving guidance is, it isn't set in a schedule of we're going to ship 25 wafers this month and 25 wafers 2 months after that. Sometimes it really depends on what the customer learns in the process of evaluating that, setting up a new set of experiments and then we ship out more. So yes, there's multiple customers here, and these are important engagements in different application areas.

Okay. All right. That's helpful, Frank. I'll probably follow up with you a little later on that one. Maybe 2 more questions. I will jump out of line here. First of all, Scott, in your prepared remarks here, and I'm sure we'll review these in detail when the transcript comes out here, but you talked about kind of segmenting your opportunity based on where in the stack your MST is applied here and you talked about on top of the wafer versus somewhere in the middle.

Certainly, layers in the middle or -- I think it's fairly understood, especially for me who is not a device guy per se that that's very complicated. But vice versa, if you can apply just on the top, that seems to be a much simpler process, which also implies it might be an area where by which you might expect to see or hope to see your first license here just from a time-to-market perspective.

So 2 questions for you is, I think I missed the applications areas that, that specifically applied for. And b, would you agree that, that's a very -- a somewhat likely or very likely situation by which you first reach first manufacturing license and commercial production?

Yes. So first of all, yes, you're right about being deposited on top of the wafer makes it much easier. The applications that we specifically spoke about that do that is RF-SOI and gallium nitride; and also in the future, we have some ideas on next-generation DRAM that could use it. So one thing to understand very briefly is when we deposit MST in the bottom layer, it has to be on a process that doesn't use incredibly high heat for long periods of time. So if we deposited -- if it was on an MST starting wafer and then someone put the wafer into an annealing step that was 1,100 degrees for an hour, then that would really damage the MST itself and it wouldn't work.

So the only time we use MST on the starting -- on the start of a wafer is on -- manufacturing processes are going to be lower temperature. And there's a lot of those. Like RF-SOI is running at very low temperatures. The new Gate-All-Around processes, they're trying to run them at very low temperatures. So in theory, MST could be on the base -- on the starting wafer for those.

Gallium nitride, we put MST on bottom before it grows the gallium -- yes, the gallium nitride on top of it. That one isn't quite as low temperature, but it doesn't matter. The MST still works as a starting wafer. So I think a layman might say, well, why don't you just do every process as a starting wafer if it's much easier and faster time to revenue. Well, it has to fit a certain dynamic, which has to do with this temperature range.

You had a second half to your question, and I've talked those [ I might have ] forgotten it.

You hit the applications. I think you've answered most of it. So I think that's very helpful. Last question for me, I'll jump out of line. You talked about this large capital equipment partner. And I think today, you mentioned about going on a roadshow here. Maybe just kind of give us a sense of how broad the engagements are with this company.

I think in the past, you mentioned 2. I don't know if that was the limit or there were more you just didn't mention, but -- well, how do we understand the scope and breadth of your interaction with customers through or with them?

Okay. So the stated aim of our partnership is in the Gate-All-Around market. And that was what we announced in our press release. However, I have to say that -- there's great value in this partner working with us in everything. And there's value in us working with them in everything. So we have talked to them a lot and done some work on DRAM as well. So basically, yes, I would say our primary focus right now is Gate-All-Around and DRAM. And when we go out on the road, that's who we'll be really targeting most closely.

Okay. Thank you, Richard. A number of questions have come in on the Q&A line, and I will aggregate them and ask some of the more common ones.

So first one is about the Gate-All-Around projects and when the -- there's a number of current projects underway that are expected to launch soon. And how many years do you expect the target process you are currently collaborating on to enter production?

Yes. So first of all, working with a few different customers, so there might be a different answer for each customer. In general, the guys working on Gate-All-Around, the great news is it's amazing working with them because they have armies of people working on this stuff, lots and lots of resources to test out your material. And the bad news on that is that they come back with a ton of requests for more information and more testing.

But they're almost always working towards some kind of a launch that you would be built into. Some of them, I would say the majority are looking at a launch that's still a few years out. There is some of them that are actually looking at using MST to improve yield on processes that are in production today.

I can't exactly say, well, if or how long it would take to get into production on those processes. But my guess is if they integrated MST, they would have to do some qualification work on it. But if it did indeed improve their yield, which I think is what the majority of them are looking at for the current timing processes, they would try to move it into production very quickly. As long as it didn't break anything in the specifications of their production wafers, they would have every incentive to get it into production as soon as possible to improve yield.

All right. In the past, you've talked about JDA1 and the fabless RF licensee. Have you been doing wafer runs for those? And what do those results look like?

Yes. So the answer is yes, we are doing wafer runs with them. Unfortunately, we don't have the results yet. I can't really commit that I'll be able to give you results from each customer. But generally, what happens is when the results come out, that's the timing when we'll be able to start driving towards licenses and transitions to production.

Generally speaking, we have a number of different customers with wafers underway right now. None of them are coming out in the next few months. I would say we might have some coming out at the end of the year, but more likely into the first quarter before we start seeing a lot of results from those runs.

Okay. And one for Frank. So the Incize partnership for GaN testing, can you talk about the economics there of who's paying for the runs and -- or for the testing, if you could shed a little light on that?

Yes. I mean at this stage, this is a -- an arrangement with [ RF ] Incize, where we're each bearing our own costs and we'll hopefully achieve a result that would lead us to some further activity. But right now, it's -- we're not paying them to run testing nor are they paying us for wafers. So it's early stage.

And I think our hope right now would be to generate good RF data because that's something notoriously difficult. RF testing is complex. It's not something that we can typically do ourselves. So a lot of the work on RF-SOI that we can do is kind of physical characteristics of our film. But when you get into some of the testing of actual devices on kind of different figures of merit, then those are more specialized tests. And so getting more insight into that is very helpful from a marketing standpoint.

And our view is there was some question on work with Soitec and wafer-based products. The more information that we have to market to the ultimate customers of RF-SOI devices, the better it is in terms of building a relationship with Soitec, who's a wafer manufacturer. So the more end demand that they see, the closer the collaboration is with us. So I kind of see it as a means to an end there.

Okay. And then Scott, going back to a topic we've touched on in the past, but is there an update on JDA2?

JDA2 is running wafers with us. And they're one of the ones that I talked about that we'd hope to get some results at the beginning of the year; and hopefully, see if we can turn that into a license and then plan to go to production.

Okay. And then with regard to the STM news, we had a number of questions on disclosure channel. And can you talk about why you chose to put the news out on a blog post?

Yes. Yes. And we went back and forth on that. So I just want to be clear, we were in discussions with ST all through August, September and into October about implementing this new version -- a new architecture we had and moving forward on 300-millimeter, and we were waiting to find out from them what the plan was, when that work would start, when they had planned that it would be trying to take it to production. And it was really just 1.5 weeks ago that we had a call with them, and that's when they told us that they did not have a plan in place to use MST to do that new architecture.

So immediately after that call, we got off the phone and we started talking about, okay, we have an earnings call in 1.5 weeks. but it seems too long to wait for 1.5 weeks before we notify investors. And so on the following Monday, we actually started speaking with ST to make sure that when we disclose this, we would be following their internal guidelines on what we could say and couldn't say. And then on Tuesday, we put out the blog post.

We could have put out a press release, but press releases tend to be, at least in our opinion, much more black and white about news that you're giving. In this case, we see it as a much more nuanced message. ST was telling us we're not -- we don't have a plan to use you guys on this next run. Yes, very bad news because I know all the investors want to know when the royalties will start flowing, and so do we. But they didn't say they'll never use us. And they also reassured us again and again that they are continuing work using our technology on other process areas.

So we felt that using a blog would allow us to give a little more nuance than a press release. And we know that the channels of communication that we have with the blog, we push it immediately out to all of our investors, so -- that are at least registered with us. And so we felt it was a good channel of communication in this particular case. And the most important thing to us was to get it out there as soon as we can within the restrictions of making sure we were working everything out with ST and so forth.

All right. And one more question here. Is there any chance of government funding now that Atomera has been working with Sandia for a while?

I talked a little bit on this call, which I've never done much about in the past about all of the different R&D efforts that we have underway. And many of them are, as I mentioned, through Academia, through outside commercial partners so that we don't have to burden our internal team with too much of it. But Sandia is very interested in many of those technologies, and they have government programs that are interested in implementing things that would use those. So yes, there's a lot of interest through Sandia.

And we also continue to work with the government and with the CHIPS Act infrastructure such as it is to see what we can do to kind of deliver some of our technology in through that channel and get some near-term revenue that way as well.

Okay. Thank you, Scott. At this time, we'll turn the call to Scott for closing comments.

Okay. Thanks, Mike. Okay. Yes, thanks for joining us and listening to our progress that we've been making here at Atomera. Next month, we'll be attending the Craig-Hallum Alpha Select Conference in New York, and we look forward to seeing some of you there, if you'll also be attending. Please continue to look for our news articles and blog posts, which are available along with investor alerts on our website, atomera.com.

Should you have additional questions, please contact Mike Bishop, who will be happy to follow up. Thanks again for your support, and we look forward to our next update call.

Thank you. This concludes the conference call.