Aehr Test Systems Aktie

Good day. Welcome to the Aehr Test Systems Fiscal 2026 Fourth Quarter and Full Year Conference Call. [Operator Instructions] Please note, this conference is being recorded.

I will now turn the conference over to your host, Jim Byers at PondelWilkinson, Investor Relations. Jim, you may begin.

Thank you, operator. Good afternoon, and welcome to Aehr Test Systems Fiscal 2026 Fourth Quarter and Full Year Financial Results Conference Call. With me on today's call are Aehr Test Systems' President and Chief Executive Officer, Gayn Erickson; and Chief Financial Officer, Chris Siu.

Before I turn the call over to Chris and Gayn, I'd like to cover a few quick items. This afternoon, right after market close. Aehr Test issued a press release announcing its fiscal 2026 fourth quarter and full year results. That release is available on the company's website at aehr.com. This call is being broadcast live over the Internet for all interested parties, and the webcast will be archived on the Investor Relations page of the company's website.

And I'd like to remind everyone on today's call, management will be making forward-looking statements that are based on current information and estimates and are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements. These factors are discussed in the company's most recent periodic and current reports filed with the SEC. These forward-looking statements, including guidance provided during today's call, are only valid as of this date, and Aehr Test Systems undertakes no obligation to update the forward-looking statements.

Now with that said, I'd like to turn the call over to Gayn Erickson, President and CEO.

Thanks, Jim, and good afternoon, everyone, and welcome to our Fiscal '26 Fourth Quarter and Full Year Earnings Conference Call. I'll start with an update on the key markets driving our business, including the strong demand we're seeing in the AI and data center infrastructure markets as well as the significant progress we made this year in diversifying and expanding our end markets. Chris will then go over our -- and review our financial results and open up the call for questions.

We're very pleased with our fiscal fourth quarter, which exceeded consensus Street expectations and [indiscernible] of significant bookings and revenue diversification for Aehr. Record quarterly bookings, a very strong and record backlog and growing demand across AI processors, silicon photonics and power semiconductors for both our wafer level and package level burn-in solutions positions us well for significant growth in '27 and moving forward, fiscal '27 that is.

With strong momentum and a record backlog heading into fiscal '27, we're expecting revenue of between $130 million and $150 million, representing 2.6x to 3x the just completed fiscal '26 revenue. Non-GAAP pretax profitability at these levels is expected to come in between 18% and 22%. With current customer forecasts that we're seeing across our wafer-level and packaged level burn-in platforms, we see the opportunity to increase our revenue guidance even higher as additional orders materialize. We believe we're not capacity limited even at the $150 million revenue levels.

To illustrate the progress we've made in diversifying its additional high-growth markets. Just 2 years ago, over 95% of our business was tied to silicon carbide for electric vehicles whereas today, almost 95% of our fiscal year '26 revenue came from markets not electric vehicle, silicon carbide. Reliability and production wafer level brand and screening for AI accelerators, CPUs and network processors were our fastest-growing markets this year, representing approximately 71% of our total annual revenue. Optical device test and burn-in for data center infrastructure transceivers, chip-to-chip bio and hard disk drives accounted for another 20%. We expect both of these markets to grow significant in fiscal 2027 and we're seeing encouraging signs of recovery in the silicon carbide market as well as new growth opportunities for power semiconductors, such as in gallium nitride and even silicon-based power MOSFETs used in both automotive and AI data center applications.

So let me provide an update on some of the key markets and customer initiatives, and I'll start with wafer-level burn-in. Demand from AI-related applications continues to accelerate. Our lead AI processor wafer-level burn-in customer is significantly ramping their products, driving an increase in forecasted capacity needs for our FOX systems and proprietary WaferPak [ full ] wafer contactors this year and over the next few years. This past year, they've ordered our fully automated WaferPak aligners to integrate with their installed base, doubled their systems from us and are forecasting significant increases in wafer allocation from their foundry this year and into the future. This has been a challenge to their growth over the last year. We're happy to see them move all production burn-in screening to wafer-level burn-in on our systems this past year. They no longer need to perform any system-level screening of their products.

This customer sees Aehr as a critical supplier, and we're working to ensure we can meet all their capacity needs as they forecast significant growth in system purchases and WaferPaks this year and over the next few years.

In addition, we're engaged with additional AI processor customers who are evaluating wafer-level burn-in to improve their product reliability and reduce yield loss from production burn-in of their devices later in the manufacturing process. This includes one of our largest package level burn-in customers who is now asking us about a wafer-level burn-in evaluation for future production of one of their AI accelerators and CPUs. This is in parallel with ensuring we can meet their package level burn-in needs with our Sonoma systems.

A key advantage of our proprietary WaferPak contactor technology is its ability to manage individual die temperatures, enabling significantly better thermal management than conventional package level approaches. Our systems can process up to 1/4 of a wafer at a time with as many as 9 wafers tested in parallel, delivering a compelling combination of throughput and cost efficiency.

So let me provide an update on our wafer level burn-in evaluation with a major supplier of AI accelerators, CPUs and network processors. We're excited to report that we successfully completed the benchmark testing of our wafer-level burn-in solution on one of their processors achieving results that exceeded their expectations and in their words, produced results better than they can get at package level. This top-tier AI processor supplier has now expressed interest in moving the pilot production test validation at their semiconductor contract manufacturer in Taiwan for their current high-volume device, which we just completed the benchmark on.

Originally, this benchmark was to evaluate wafer-level burn-in their next-generation device. Instead, they indicated that based on results they -- based on the results, they're interested to pull this device in and to consider wafer-level burn-in on this current device as well. They told us this current device is expected to continue ramping and achieve significant volumes over the next year or more. In addition, they also requested that we evaluate a second device in parallel. The potential revenue opportunity from one of these devices is significant to Aehr in terms of near- and long-term revenue streams related to the wafer-level burn-in systems and proprietary Aehr WaferPak contactors.

Turning to wafer-level burn-in for silicon photonics devices. As we have anticipated for the last year, silicon photonics devices and the need for production burn-in are now seeing strong momentum as AI data center architectures increasingly rely on optical I/O and high-speed optical interconnects. Our lead silicon photonics customer is ramping with follow-on orders over the past year and more already in this fiscal year for fully automated wafer-level burn-in systems powering AI optical I/O and data center interconnects. These systems are fully integrated with their automated wafer handling equipment, enabling fully automated high-volume production burn-in with hands-free operation using automatic guided vehicles marking another important milestone with this long-term customer.

In addition, our newest major silicon photons customer, a global leader in networking products and solutions has provided us with a forecast for additional systems this calendar year as it ramps capacity support next-generation hyperscale data center deployments. This customer first engaged with us just last November, and has since ordered 2 of our 9 wafer FOX test cells and 2 of our FOX-NPs. This engagement progress -- progressed quickly from initial contact to their first order and our first delivery of fully integrated [indiscernible]. We believe our sales process is shortening over time as our wafer-level burn-in solutions are becoming more pervasive across multiple industries, customers and countries. We believe the silicon photonics and optical test and burn-in market has substantial growth potential and can be a meaningful long-term growth driver for Aehr.

So now let me share some highlights of our progress in power semiconductors and wafer-level burn-in the past year. We completed more than a dozen designs for gallium nitride WaferPak's, which are now being sampled by potential customers. Many, if not all, are expected to move to volume production on our wafer-level burn-in systems, driving the need for systems and WaferPaks for this year and going forward. We also just completed the first -- the world's first 300-millimeter GaN wafer-level burn-in solution using our high-voltage WaferPak to stress and test the critical high-temperature reverse bias test needed to screen for GaN MOSFET defects in production.

Just recently, we closed the sale of our first box system for a silicon MOSFET wafer-level burn-in application. Prior to this, customers had purchased our FOX wafer-level burn-in systems only for nonsilicon MOSFETs such as silicon carbide and gallium nitride. We're working with this customer to determine test times and quality screening modes that we hope will lead to production burning capacity needs as the customer has indicated. We also captured our first silicon carbide customer in Taiwan. This customer works closely with several automotive manufacturers in Taiwan and -- in Taiwan and China as well as other international companies. Securing this win was especially important to us because they chose Aehr over semi a Chinese company that recently reincorporated in Malaysia as [ NEXUS ] test for their silicon carbide wafer-level burn-in products. As some of you know, Aehr Test is currently suing [ Semi Nexus ] test for patent infringement of their silicon carbide focused wafer-level burn-in system.

We believe they are violating our IP and patents that we hold in many countries around the world including China, Taiwan, Japan, Korea, Singapore, the EU and the United States. We were chosen over semi due to technical superiority, cost and our reputation in the automotive industry for production wafer-level burn-in of silicon carbide devices for EVs. We are seeing encouraging signs of recovery in the silicon carbide power semiconductors and actively engaged to meet the wafer-level burn-in needs of several of the world's largest automotive OEM manufacturers the car and EV suppliers and several of their silicon carbide suppliers for their new electric vehicles.

We also announced today that we received approximately $8 million in new orders in just the last month for silicon carbide wafer-level burn-in WaferPaks as global electric vehicle programs accelerate. These include expanded production orders from our lead silicon carbide customer for WaferPak full wafer contactors and a key order directly from one of the largest automotive companies in the world for multiple WaferPaks to be used in the qualification of silicon carbide devices from suppliers for the new generation of electric vehicles using Aehr's FOX wafer-level burn-in systems.

This year, we expect renewed demand for both silicon carbide and GaN power semiconductor test in burn-in, driven by automotive electrification and AI data center power infrastructure.

Let me talk a little bit about wafer-level burn-in for memory. We also continue to pursue opportunities in memory, including NAND flash and potential high bandwidth memory DRAM applications as part of our wafer-level burn-in solutions road map. The growth of these 2 memory markets may be stronger than ever with massive capacity increases planned for this decade. With our wafer-level burn-in benchmark with a global leader in NAND flash completed, we're in discussions on how to move forward. As we said last quarter, we hope to close on discussions about test system specifications needed for next-generation flash memories and in particular, their high-bandwidth flash devices which would lead to a development agreement to supply systems and WaferPaks to them over a 12- to 18-month deployment -- development of our new memory optimized blades for our FOX-XP and NP multi-wafer test and burn-in platform.

We're also in ongoing discussions with other key memory suppliers that produce high bandwidth memory the new DRAM standard used in AI GPUs as well as standard DRAM and flash memories to align our solutions with the production needs of these companies, new capacity coming online. As we've noted before, this is a key focus for this year with the goal of reaching an agreement with these customers to develop the enhancements needed to extend our FOX system into these markets. We believe this market could drive orders in fiscal 2027 with ramps in fiscal 2028.

Now turning to package level burn-in. Our package level burn-in business for AI processors also gained momentum over the year, highlighted by record follow-on production orders from our lead hyperscale customer for Sonoma systems supporting high-volume AI processor production burn-in. This customer is a premier large-scale data center provider and is forecasting a substantial expansion of Sonoma system purchases for a second device, which is twice the power per package is the first device that they used Sonoma systems for today. As their current and next-generation devices ramp, we believe Sonoma Systems and consumables can become an increasingly contributor to Aehr's revenue.

This past year, we secured key new device wins on the Sonoma platform for high-temp operating life qualification. We're also engaged with multiple current and prospective customers for package level reliability qualification and production burn-in of AI accelerators, ASICs network processors and also for edge AI processes for automotive and robotics, which represent significant opportunities for Aehr over the next few years. Recently, we introduced an enhanced Sonoma high park configuration designed for next-generation CPUs, GPUs and high-performance network processors used in AI data center and communications applications. This enhanced system expands the Sonoma product families capabilities with per device power up to 2,000 watts or more, increasing total system power capacity and improved device count scalability. It also includes an optional fully integrated auto aligner and a high throughput automated loader unloader that enable completely hands-free operation in the production environment.

Unlike traditional batch flow burn-in, the Sonoma high-power configuration with [ ALU ] is designed for continuous flow operation, enabling devices to begin testing immediately upon insertion. The automation and thermal systems run continuously, maximizing equipment utilization, throughput and return on investment for both engineering qualification and high-volume manufacturing environments. Our Sonoma systems deliver what we believe is the industry's lowest cost solution, enabling customers to transition seamlessly from early reliability characterization to full production burn-in and early life failure screening. This approach helps reduce costs, improve quality and accelerate time to market. To meet anticipated demand, we've been expanding manufacturing capacity for both our systems and consumables. that's both on the wafer-level and on the packet. This additional capacity positions us to support expected customer ramp-ups and provides flexibility if demand exceeds our current outlook.

Looking ahead, we're very excited about our position entering fiscal 2027. We have multiple customers who began production over the past 12 months and are now ramping up. Creating the potential for meaningful follow-on demand for systems and consumables. With multiple customers entering or expanding production, a record backlog and additional opportunities under discussion for both wafer-level and packaged level burn-in, we believe Aehr is well positioned for multiple years of strong revenue growth.

With that, I'll turn it over to Chris.

Thank you, Gayn. Before I review our financial results, I would like to provide a brief update on the steps we're taking to expand our manufacturing capacity and consumer support infrastructure to support our growing backlog future. growth opportunities. As Gayn mentioned in the last conference call, we continue to scale our manufacturing capacity to support growing demand. In addition to our Fremont expansion, we began shipping Sonoma systems from one of our existing contract manufacturers in Southeast Asia. This adds capacity for more than 20 additional Sonoma systems per month and gives us greater flexibility as we scale to meet customer demand.

With the recent record [ $41 million ] purchase order we received from our hyperscale customer in April, we are very active operationally as we build Sonoma systems to meet the customers' delivery schedule. This system is expected to be delivered this year to the OSAT of our hyperscale customer, which is based in Taiwan. [indiscernible] also reported today that we successfully completed benchmark testing of a wafer-level burn-in solution with a major supplier of AI accelerators, CPUs and network processors. The testing was completed on one of their processors and achieved results that exceeded their expectations. This top-tier AI processor supplier has now expressed interest in moving to pilot production test validation for its current high-volume device.

In anticipation of next stage of this project, we have recently signed a new lease to expand our office in [ Shenzhou ], Taiwan. This expansion will allow us to increase our local sales and customer support personnel deepen our engagement with customers and ecosystem partners in the region and strengthen our ability to support future production ramps. With recent manufacturing capacity enhancements and an increased presence in Taiwan, we believe we are well positioned to support significant growth in both wafer-level and package-level burn-in systems as customers ramp production.

Now to our financial results. Bookings in the fourth quarter of fiscal 2026 were $60.7 million, up more than 500% from $11.1 million in the prior year quarter. The increase was primarily driven by purchase orders for Sonoma package-level and FOX wafer-level burn-in systems, WaferPaks and burn-in modules sports for AI and silicon photonics processor burn-in. Partially offset by lower customer orders for silicon carbide WaferPaks.

Backlog at Aehr was a record $80.6 million, up from $15.2 million at the end of fiscal 2025. Subsequent to year-end, we received an additional $20 million in bookings during the 4-week transition period and the first 2 weeks of fiscal 2027. As a result, our effective backlog increased to approximately $100.6 million before taking into account minimal shipments during the transition period ended June 26, 2026, which is not part of fiscal year 2027.

Turning to our Q4 performance. We're excited about our continued momentum in the artificial intelligence and data center markets. AI processors and silicon photonics burn-in accounted for more than 80% of our fourth quarter revenue compared with 56% in the prior year period. For the fourth quarter, we had 3 customers representing more than 10% of total revenue. Two of these customers target the AI market and the third focus is on the data center optical transceiver market.

Revenue for the fourth quarter totaled $18.8 million, up 34% from $14.1 million in the prior year quarter. The increase was primarily driven by strong demand from AI and data center customers for our FOX systems [indiscernible] auto-aligners and WaferPaks. Contracted revenue was $5.8 million, representing 31% of our total fourth quarter revenue compared with 30% in the prior year period. This remains a sizable revenue stream for Aehr driven by demand for new WaferPak designs as existing and new customers deploy FOX systems for additional device applications.

Non-GAAP gross margin for the fourth quarter was 45%, up 1,000 basis points compared with 35% in the same period last year. The increase was primarily due to higher revenue levels, improved manufacturing capacity utilization and more favorable product mix. In the fourth quarter fiscal 2025, our revenue was driven primarily by the sale of package-level burn-in systems, which had lower product margins.

Non-GAAP operating expenses in the fourth quarter were $7.5 million compared with $5.4 million in the prior year quarter. The year-over-year increase was primarily attributable to higher employment costs as we add headcount to support our R&D projects as well as higher commissions related record bookings from customers in the AI and data center markets.

As an update on our patent litigation against [ Semi ] in China, we continue to incur legal fees during the fourth quarter to support our claims. We are encouraged that the patent office in the Beijing District of the People's Republic of China has upheld 2 of our Chinese patents, which is critical to our litigation against [indiscernible]. The case is still ongoing, and we anticipate incurring additional legal expenses in upcoming quarters as we continue to protect our intellectual property rights in China.

Non-GAAP net income for the fourth quarter excluding the impact of stock-based compensation and amortization of intangible assets was $3.6 million or $0.11 per diluted share well above Street consensus. This compares with a non-GAAP net loss of $0.2 million or negative $0.01 per dilution in the fourth quarter of fiscal 2025.

Turning to the full year results. We reported revenue of $50 million, down 15% year-over-year. Full year non-GAAP gross margin was 38.5% compared with 44% in the prior year. Full year non-GAAP net income was $0.9 million or $0.03 per diluted share compared with non-GAAP net income of $4.6 million or $0.15 per diluted share in fiscal 2025.

At the end of the fourth quarter, cash, cash equivalents and restricted cash totaled $116.5 million compared with $26.5 million at the end of fiscal [indiscernible]. During fiscal 2026, we raised approximately $100 million primarily through our ATM program, significantly strengthening our balance sheet. Although Aehr remains a capital-light company with only $2.1 million in capital expenditures in fiscal 2026. This enhanced financial position provides the working capital and flexibility to pursue larger customer opportunities and scale production to meet customer demand.

Now I will share our guidance. For the fiscal year ending June 25, 2027, we expect total company revenue to be between $130 million and $150 million, representing expected year-over-year growth of approximately 160% to 200%. This outlook is based on the information available to us today, including our current backlog and anticipated customer demand. We continue to pursue additional orders from existing and prospective customers. We also expect pretax non-GAAP net income to be 18% to 22% of total revenues.

Lastly, looking at our Investor Relations calendar. Aehr Test will be participating in 3 upcoming investor conferences over the next couple of months. We'll meet with investors virtually at the Needham 6th Annual Semiconductor and Semi-cap one-on-one conference on Wednesday, August 20. The following week, we'll meet with investors in person on Tuesday, August 26, at the Jefferies Technology Summit Conference in Chicago. On September 10, we will meet with investors in person at the Lake Street Capital Annual Big Ideas Growth Conference in New York City. We hope to see some of you at these conferences.

This concludes our prepared remarks. Operator, we're now ready to take questions.

[Operator Instructions] And the first question today is coming from Christian Schwab from Craig-Hallum Capital Group.

Congratulations on the fantastic outlook. Gayn, I know you gave some description of revenue by application for the last fiscal year. But as we're thinking about the [ $130 billion to $150 billion ], not obviously asking by wafer-level burn-in or the Sonoma Systems. But can you just give a rough idea of the assumption as far as product mix between AI chips, silicon photonics, power, and if there'll be any memory revenue, it sounds like that's fiscal '28.

Yes. So we will. And the only challenge, of course, is we've never done that before. And so in reality, our ability to always predict. But in our current kind of roll-up right now, it's pretty similar to last year in terms of AI, 70-ish percent, the silicon photonics maybe 15%, 20%, maybe in that same range. And then the power semiconductor and miscellaneous is kind of the rest. But there's some pretty good -- and by the way, and I will state, we currently do not anticipate any memory revenue in even the 150 number. So upside on any potential revenue from memory would be in addition to that. But right now, we're not assuming any of that.

And the bulk of that, if not the majority of all of that range of [ $130 million to $150 million ] is coming from current customers. So not really even including, I want to be able to give ourselves a little leeway of this new benchmark customer that just -- that we've just completed with amazing results. That would be upside to that as well. I think last year, I talked about the silicon carbide customers a year ago, we're all talking about how great it's going to be, and this is going to be a turnaround year. They didn't really give us really detailed forecasts so I think I shared a year ago, I'm kind of in a wait-and-see mode. I'll just believe it when I see the orders. This year seems a little bit more specific. We have some people with real numbers, some real forecast, some real targets we're seeing the population of our installed base to be at pretty well full capacity. So it does feel more real this year. And so I'm more optimistic, but we still have a pretty small number.

Yes, a pretty small number. Actually, I think we might have just exceeded it. So that will -- that's probably we want -- Chris is looking at me like I'm sharing too much of it. So that order we just got -- those orders we just got in, I think we exceed what we were already planning. So we'll see how this goes. There's just a lot of opportunity. But AI is going to be a big chunk of our business this year, both in dollars and percentage.

Fantastic. And then just on the memory, it sounds like you feel more confident in the development program. Last quarter, you did mention kind of roughly the same words that it could lead to orders in '27 in revenue in '28. But it sounded like you were more confident that you will get orders at some point in fiscal '27 for revenue in '28? Do I hear that right? Or did I...

More confident than last -- I'm not sure I'm more confident than last quarter. I mean I was moderately confident last quarter as well. We're -- we have more detail. We've actually started to spend money on it. So we've hired some people and redirected some people and we're doing architectural schematics and assessment, there's some software that started physical board layouts as part of the proposals to the customers. And -- but we really believe you need a committed customer to a project. There's a sort of -- whether it be appeal or a sponsorship, but you need to make sure you're aligned with what they want and what they're going to buy at the price point you're willing to sell them at. And that's the piece that we still need to get ourselves resolved to.

There's been some dynamics during the last year, if you look in the last 12 months, what's kind of changed. The introduction of high-bandwidth flash is a [indiscernible], right? That has really put at least a couple of its publicly known on their heels in terms of what they were going to do, how they could test it and it broke a lot of things. The other piece is the new HBM, which is a DRAM, right? High Bandwidth Memory is DRAM, high bandwidth flashes or flash. But HBM new standards that are coming out, I don't want to get too carried away here, some of it is driven by specific end users, have embedded best capabilities in it, which means that the testability changes dramatically, and we think could be in our favor. So it's given me some additional optimism with respect to our ability to maybe do HBM sooner than we were thinking certainly 6 months ago. But I'm going to just keep optimistic attitude that we're going after this business, but I would be hesitant for you to build models with a lot of revenue in that yet, certainly not next year.

Great. And then I'll just slip in one more, if I could. There was a lot of different discussions regarding capacity. And I guess, couldn't write all the answers down quick enough to kind of do the math. But as you sit here today, as far as top line revenue capacity, what do you believe it is?

Yes. So we've talked about some different pinch points, okay? So people that have visited us know that we have done the -- until recently, all of our systems and our consumable wafer packs came out of our Fremont facility. But the supply chain of our chambers, our blades and all the subsystems and printed circuit boards are, of course, built by contract manufacturers. For the 150 employees or thereabouts that Aehr has. We have probably another 250 people in direct contract manufacturers building stuff for us in low-cost regions around the world. We have increased our capability in our facility maybe tenfold with the remodel and the other things that we've done. But we still are only running one shift from an operational perspective. We don't have the people to chip tenfold, but the capacity is here to be able to do that.

People go, "Well, that's crazy. Why would you do that?" Well, as some of the deals we're talking about, if a customer comes to us and said, "I want 100 systems, you have to be able to say I can do that and it won't take me 3 years to build it for you." Okay? In parallel, we talked about this in more detail last quarter. We pulled the trigger last September with one of the contract manufacturers in Asia that does assembly of one of our chamber suppliers. And they upgraded their facility to near clean room space in anticipation of some of the projects that we wanted to outsource to them. We then initiated and gave them orders and worked with them to build our Sonoma systems. And then the last quarter, we shipped our first Sonoma systems directly to a customer out of that facility. Our team was there working with them, bringing them up, qualifying everything, demonstrating, then observing, then qualifying the tools.

But those systems are actually being installed, I think, last week or this week at our large hyperscaler customer. And their entire backlog is expected to ship directly out of there. We think the capacity out of that is probably upwards of 20 Sonoma systems a month, and that would basically not impact any of our capacity here. So our capacity is significant. I mean, measured in hundreds of millions of dollars for sure. And we're doing some things to even potentially increase that. Not that we would then tip $1 billion a year, but what happens if we have to ship a couple of hundred million in a quarter. Think of it that way.

So one of the challenges in our business is that it's always going to be lumpy. And we do not want to put money in place an infrastructure that's permanent because all the business is cyclical. And 5, 8 years from now, what this thing looks like, we don't want to have built up into an enormous business and if there's a softer year that we start losing money or not making much profit. So I know that's a negative tone on this thing, but the discipline is how do you build up massive amounts of capacity without building a massive amounts of just fixed infrastructure.

Got it. That is fantastically clear. No other questions.

The next question is coming from Jed Dorsheimer from William Blair.

Congratulations to you Gayn and Chris, I know how long it's been coming in terms of this inflection. So a few questions for you. I guess, first one, maybe just piggyback off your last response gain to Christian there. Did you -- did I hear you correctly, 20 Sonoma systems per month? And if that is the case, that's about $100 million of Sonoma. Is that the right way to think about that in terms of the 140 midpoint of guide?

So let me make sure [indiscernible]. So at our 140 midpoint, that's nowhere near 20 Sonoma systems a month. The production in Sonoma systems that we have in backlog, we shared with this with different people including the consumable elements are somewhere in the $600,000, $700,000 a piece. They're actually smaller configurations than times quantity. And I think that we've done a pretty good job of announcing orders along the way. So our package level burn in Sonoma revenues are [indiscernible] I do this. They have them in front of me right now, probably $50 million something along that range. I think that's good. Sorry, guys, I should have it in front of me.

So that's -- think of the math of that, whatever like 60, 70 systems or so. So -- but we're actually shipping -- those are -- the customers actually ask for those kind of in a small period of time, very much centered around our second quarter. And so that's going to be one of the challenges. We're actually being them right now. We're going to start shipping them here during this quarter and then the bulk of them actually get delivered in the second quarter.

That is helpful. And then on the wafer-level, if we took that midpoint, what are the -- are you mixing in? I'm trying to separate consumables from package and wafer-level. Can you -- can you give some framework in terms of that breakdown?

Well, let me answer that question, Jed. So if you heard me, I mentioned about -- we're roughly in the 30% kind of distribution or [indiscernible] in revenue. Yes, in revenue. And that's WaferPaks and [ BIM ]. Yes. Yes. So I think that's a good assumption. It's about 30%.

That sounds right to me as well.

Okay. That's super helpful. And then two more for me. Just along the lines -- or maybe three more, sorry. But your largest processor, GPU, TPU CPU customer, your AI customer, I think, is how you described it. Do you -- in addition to the benchmark testing, I'm just curious that they're going with package level, but could you update on the activity or discussions around wafer-level? I'm assuming that they're also engaged in kind of that open the door, if you will. So just an update there.

It's a bit of a lookup table. So we -- I think what you're talking is are a kind of lead AI production package-level burn-in customer who identifying one of the big hyperscalers. Okay. All right. They are -- they use Sonoma for all their qualification, they had never done production burn-in before, and they moved to production burn-in as we acquired [indiscernible]. And that's been a great win for everybody because of our capabilities to support them and obviously, to meet their capacity needs.

That customer, the first device that ever went to production was on Sonoma. The second device is also going to be on Sonoma. Then we bought some of the systems for it. That particular device has been a little bit delayed in terms of its timing, but is still expected to ramp or at least start the ramp during our fiscal year at this point. That's the one I described that is twice the power, and they're expecting higher volumes of right?

And then that same customer talked to us for maybe 6 months ago, the first time, the third device, they really want to consider a wafer-level burn-in. And one way you might want to think about it is if there's a progression of number of compute chips in a single package, as they get higher you -- wafer-level burn-in has a huge advantage because the devices failed during burn-in. And if you fail one of the compute chips, you throw away the other compute chips and all of the memory. And so at that point, it gets extremely expensive from a yield loss to continue to do package level burn-in. So that would be where you'd want to cut in that way for a wafer-level burn-in.

So they've actually recently in this quarter, again, they're just bringing up their second device, but the third one, they've been talking to us about, "Okay, what do you have [indiscernible] do we need to do? What do we need to put in? How do we optimize it around the FOX system." So it's pretty encouraging.

Got it. That's helpful. And just shifting gears, silicon photonics and co-packed optics, I know you mentioned activities. The gallium nitride really had struggled with reliability in the auto. Auto requirements are far lower than in data center by about 5x in terms of mean time failure. So I think that would be a good thing for you guys, but I'm just curious how you're thinking about market adoption timing and then roll in GaN specifically. I know what you've got for silicon carbide, just curious in terms of activity around GaN and the higher failure rates there.

Okay. You actually mentioned silicon photonics. You mentioned silicon carbide and GaN. Let me just do I think through that window. GaN has been interesting. If you remember 1.5 years ago or so when we were engaged with the first GaN customer, we didn't know if they were going to go to production burn-in or not. Since then, we've been able to verify they are, and they're going through a major qualification with a bunch of industrial automotive and infrastructure and data center applications. It's -- I like some carbide that's like 2 or 3 big applications, GaN, we've done like 12 different types of devices. So there like different voltages and power requirements that they go through all -- from solar to data center to electric switches and infrastructure and homes to automotive. They're all over the place. So they all have different kind of requirements.

But so far as we can tell, every one of them needs a production burd-in screening to meet the reliability requirements. And it's been a learning process for us. So, GaN, is extremely difficult to actually test and burn-in at wafer-level. We've learned, but it's now been debugged and fully working through and things are going really well for us right now. So we think that, that will grow. Now the GaN market, by the market forecasters is just dollar-wise is measured in single to tens of billions of dollars over the -- in this decade, whereas AI or memory is 10x that. So they can just -- they simply could never spend as much money as some of the other markets. But from a reliability perspective, it's very clear the value of burn-in and we've been proving and validated the value of wafer-level burn-in of GaN similar to silicon carbide.

And then silicon photonics similarly, that's been the big debate as the data centers really need to go to burn-in to silicon photonics, optical transceivers for fiberoptic communication basically. The burn-in requirements are kind of very clear in front and center. So the hyperscalers the big data center guys are all talking about this, and it's sort of cool to be in burn-in, if you will, right now. That sounds kind of finally a plan where I actually -- Chris is laughing I've never said that before. But it is. It's just now, it's -- a lot of people are talking about burn-in as kind of the place. I believe that burn-in is by far the fastest growing segment and all the semiconductor test right now and wafer-level burn-in in particular.

Awesome. Last question for me, I promise. Chris, can you just help with cadence in terms as you look at the year, how are you thinking -- I mean, Gayn mentioned second quarter in terms of some concentration on the package level burn-in systems. Is there some way to think about there's a pretty big shift year-over-year in terms of the uplift, how to think about that flow as we go through the year? Any thoughts there or not specific guidance, but just general seasonality...

[indiscernible] revenue run rate kind of thing. So if you know historically, we kind of said, "Hey, our first half is softer than the second half." but I would say this year, it's hard to say that because as Gayn mentioned, we're going to ship a lot of the package level Sonoma systems in the second quarter. So second quarter is going to be a big quarter. So you could.

First quarter pretty good, [indiscernible], maybe third quarter is flattish, fourth quarter is up from there.

So there's a high likely hood that the first half might be the same or even better in the second half, but second quarter is going to be a good -- very strong quarter for us.

[Operator Instructions] The next question is coming from Max Michaelis from Lake Street Capital Markets.

A few questions for me. One is a clarification question. So that April order you put out, I think it was a $41 million production follow-on order with a lead hyperscale. I think that was an order -- a production order for the Sonoma systems. Just to be clear, they aren't transferring over to wafer-level burn-in. This is a completely different customer, correct?

No, that's the one we're talking about that is currently on package. Then the second part is package and the third part is wafer level or potentially being evaluated for wafer level. It gets kind of interesting because they want to make sure we can also do the package for the third one. So we have to -- we're kind of, I guess, -- we have 2 dogs in that race, and it's a 2 dog race. So yes. But by the way, the first device, we think, is not even this fiscal year.

Okay. And I guess my follow-up to that would be expect sort of a similar order size, I mean, for the -- on the wafer level side for them?

Good question. If they do the same capacity, it would be higher. Our wafer-level systems do, in fact, cost more per dot than the package level today. Margins are better, too, but the value proposition is different because you get the yield advantage, which more than makes up for the price of the machines. So just from a product positioning and pricing, I mean, we have a lot more IP in it. There's a lot of R&D people. We have enormous investments that we recover through the wafer level, and we have all this IP that is worth it.

So customers come to us not just to cost-effectively do burn-in. But at wafer level, it's because the device doesn't even exist in another form or they put the device in with something else and then if they burn it in and it fails, the something else gets thrown away. And so the wafer level burn-in value proposition has more to do with the yield improvement which can be measured in 1% of all products, if they have 8 devices in the package, it's equivalent 8% yield advantage. The cost of test might be 0.1% or 0.01%. So the price doesn't really come into effect.

Okay. And then last one for me, and I don't know, you might have mentioned it, but the second major AI processor that just completed the benchmark testing, I mean, what's sort of the ramp-up there? I mean I mean, I know you kind of left it open ended with the guidance range of being $130 million to $150 million could you've taken higher. I mean, could you see a major order coming in fiscal year '27 to be able to complete that?

Yes.

Pretty brief.

Yes. We can -- I mean, as we've been adding capacity, and we have multiple AI customers that are engaged with, to some extent, we can build to forecast. We are having discussions about what if you throw a party and everybody comes, right? What does that look like? And we're trying to meet at very high levels with the customers and potential customers and make sure we get an idea of what kind of capacity they look like. These systems have a lot of capacity, though. I mean, when you think about a tester that is footprint of a competitive [ ATE ] machine like a [ $93,000 ] from [ Advantest ] on testing 9 AI wafers in parallel, I would say, 1/4 of the 60 devices that are running there's a lot of capacity that you put in place.

So we say, "Oh, I'm going to go ship 20 machines, right?" it's 180 blades -- 180 wafers at capacity, 180 wafer test floor is a big test for. And we could put 18 -- we put 20 of these and it's in the size of 20 parking stalls in the garage and out in your parking lot. Think of 20 cars out there, that's more than enough to support 20 of our machines. Now think of 180 of our competitors in the same garage. And these are state-of-the-art clean room space. These are bunny-suited test floors.

Just have to remember that when someone says, oh, you can ship 5 XPs a month. If there are 18 blade machines, there are 100 testers a month of capacity. And like in silicon carbide, testing all 3,000 die in parallel and 1 insertion per wafer. These are very high volume, very capable machines while we get several million dollars a piece for them upwards of 6, including wafer packs. Okay? We [indiscernible].

The next question is coming from Larry Chlebina from Chlebina Capital.

I just want to quantify the capacity in Fremont. You mentioned 1 shift, 2 shifts. So on the Sonoma side that what I call Sonoma MAX, I guess those are fully automated. What is the throughput capacity expected on -- in Fremont? Is it still 20 Sonoma MAX per month?

So if you were to look -- if you were to come and look at our facility as many shareholders have, one of the -- what we did in our big modification upgrade a couple of years ago was add enormous amount of additional cooling and power capacity. That gives us drop locations for upwards of potentially 16 locations, physical locations for the equipment to be plugged in, another 4 mechanically plus the test labs. What does that mean? It means that, theoretically, you could have 16 of these machines plugged in and powered up in going through different levels of test.

Now depending on the tool, they could take from several days to several weeks to be on that floor. What we've been doing in parallel is bringing up the CMs to be doing most of that work so that when it comes into the facility, maybe they only sit there for 1 week. So if you do that math, you're like, well, wait a minute, you could do 16 a week and 4 per week. Wow, that's a lot. What I've shared with people is we can reasonably see the ability to do, say, 20 combination of package or wafer level systems a month out of this facility within the supply chain infrastructure that we have. But we have not initiated all of that. But in certain cases, we have chambers, we've been talking to the CMs about auto aligners for both the package and also the wafer level. And so if those were a $1 million Sonoma MAXs, as you call them, we actually call them Ultras? $20 million a month of Sonoma. If you were 20 wafer-level burn-in systems a month, they've an ASP closer with the WaferPaks of $5 million. There are $100 million a month.

So people like, "Oh, my gosh, you have $1 billion worth of capacity." Conceptually, yes. for my employees that are listening, we need to hire more people, and there's a lot more work that needs to be done. But with a running head start and the customer forecast, we could do enormous amounts relative to our current size just out of this facility.

So actually, the number would be 20 Sonoma Ultra's per month or 20 XPs per month, not both, not 20 each.

Yes. Okay. So you're right. You caught me on some, except for we just initiated the 20 Sonoma's outside of our facility.

I'll know about that.

Yes. So what it means, Larry, is we could run the 20 Ultras shipping directly from Southeast Asia and then still do 20 XP's here a month.

Okay.

And by the way, I need to put some disclaimers for all the attorneys listening. Some of these challenges would be particularly material or getting access to some of the challenges that we've seen on the power supplies, for example, on Sonoma's is some of the power supply manufacturers that we use in Sonoma are supplying to NVIDIA and others, and they've come back and they've raised their prices 40% if you want to give them. And so we've been buying components with long lead time items and things like that.

So if we make it sound easy that we're over stating, it's actually quite difficult to do what we're doing right now. But so far, we're able to keep ahead. And then I think almost everything in my backlog we could ship before the customer has requested it. I'm thinking like all the Sonoma, Chris, almost silicon photonics customers. So so far, we've been on top of that. And our goal is to stay ahead of that. So customers, if they want it, we could ship it within -- as soon as they like it.

Okay. Then on the paid evaluator, did you say that in your guide for the full year, you don't really have any revenues in there from this particular potential customer. Is that -- did you say that.

Got little to none at this point. It's in the noise level.

So potential big upside, assuming that gets cut off. And then lastly, in your written release, you mentioned on the memory side that you work with -- you're working with multiple memory suppliers. Does that mean more than 1 HBM, I mean, how far are you engaged with the HBM potential customers.

[indiscernible] conversations with suppliers -- okay, let me make sure I do this right. 2 to 3 on flash and 2 on DRAM.

Okay. And the primary...

That are listening that aren't aware, there's literally like memory manufacturing in the whole world that matter, so I apologize. So -- and if you're not -- for those that are in the fifth and sixth, they might be offended by that, but of the top ones, I'm [indiscernible] on from those.

Okay. And then the primary flash, you engage them over 2 years ago, and yet they have any revenue or orders from. Is that -- that's going to happen there unless HBF gets kicked off or as far as you can see or?

I don't know. That was a huge change amongst some other organizational things that happen to them pretty dramatically about a year a few months ago. So at this point, feedback recently has been they really need something for the HBF, but they really want something for their standard flash HBF architecturally is way more power, more power supplies, it's technically a more expensive tester but they really like the price point of the current test capability, and so we're kind of working through that. We got to find the math for that. And we need their help to sort of get the ball going because we obviously have a lot of opportunities ahead in all kinds of markets. And we just on the sort of help us help them.

Yes. But on the memory side, that would still be the first potential sale revenue for any of the 4 memory people you're talking to, they would be.

I think so, Larry, I would put some bet on a wildcard because this new HBM has a logic interface for its testability. It's breaking the memory testers. And technically, when I describe a new memory tester, I am talking about, well, most people don't know or care on this call what a memory test is, but a memory tester is built with a pattern generations. It's sort of a different architecture and a different base than a logic machine. So if you have an APG-based memory tester, it would be really good for flash or DRAM. But if you had a logic best engine in the device, then it may not even be very good at doing [indiscernible]. And so you would need something that looks like a logic tester, which candidly is more like what we build today with flash.

Our -- the FOX-XP was originally designed for the best engine of a couple of the big flash memory manufacturers. Flash has built-in self-test, DRAM until recently never has.

You mentioned that they were coming to you these potential customers. Would that be a function of potentially this paid evaluator telling them, "Hey, get over to Aehr Test and get your reliability better before you take out our accelerators." Is there any angle on that as -- do you think it be.

That to be a little too bold for me right now. I don't think that's the case. I do think there is a general tone amongst and growing amongst the data center buyers, all the hyperscalers from Google and Meta, all the papers that you see Apple, certainly, Tesla of an increasing expectation of test and reliability to screen out defects so that doesn't show up on my data center floor. So that's more of a go get your act together in general than necessarily go to Aehr.

I will say that by contrast to the automotive guys, we specifically have automotive EV suppliers telling their suppliers go get Aehr, okay? I mean, that's true, right? So that's a different -- we love that, right?

But imagine that 1 of the biggest 1 of the 2 biggest automotive suppliers in the world buys our WaferPaks, tells their suppliers. We'd like to qualify you for your silicon carbide reliability, then we're going to use the Aehr Test FOX system with our WaferPak to validate your devices and good luck to you. Pretty impactful, right? So I don't have that with the AI customers today. That would be nice, but we don't have that.

Not yet.

Chris said not yet.

Good job. I'll let you go.

Thank you. I'm not seeing any other questions in queue at this time. I will now turn the call back to management for closing remarks.

All right. Well, thank you, everybody, for listening in and joining us. We're really excited to work hard for you guys this year. This is going to be a great year for Aehr and hopefully, for our customers and our shareholders as well. And we look forward to giving you guys an update as we go along. Take care.

Thank you. This does conclude today's conference. You may disconnect your lines at this time. Thank you for your participation.

Greetings. Welcome to the Aehr Test Systems Fiscal 2026 Third Quarter Financial Results Conference Call. [Operator Instructions] Please note, this conference is being recorded. I will now turn the conference over to your host, Jim Byers of PondelWilkinson Investor Relations. You may begin.

Thank you, operator. Good afternoon, and welcome to Aehr Test Systems Third Quarter Fiscal 2026 Financial Results Conference Call. With me on today's call are Aehr Test Systems' President and Chief Executive Officer, Gayn Erickson; and Chief Financial Officer, Chris Siu.

Before I turn the call over to Gayn and Chris, I'd like to cover a few quick items. This afternoon, right after market closed, Aehr Test issued a press release announcing its third quarter fiscal 2026 results. That release is available on the company's website at aehr.com. This call is being broadcast live over the Internet for all interested parties, and the webcast will be archived on the Investor Relations page of the company's website.

And I'd like to remind everyone that on today's call, management will be making forward-looking statements that are based on current information and estimates and are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements. These factors are discussed in the company's most recent periodic and current reports filed with the SEC. These forward-looking statements, including guidance provided during today's call, are only valid as of this date, and Aehr Test Systems undertakes no obligation to update the forward-looking statements.

And now with that, I'd like to turn the conference call over to Gayn Erickson, President and CEO.

Thanks, Jim. Good afternoon, everyone, and welcome to our third quarter fiscal '26 earnings conference call. I'll start with an update on the key markets driving our business and strong demand we're seeing, particularly from AI and data center infrastructure. Chris will then review our financial results, and we'll open up the call for questions.

We're very pleased with the strong momentum in our business across multiple market segments highlighted by more than $37 million in quarterly bookings and a book-to-bill ratio exceeding 3.5x. Our effective backlog, which includes the backlog of $38.7 million at the end of the fiscal third quarter plus additional bookings received since the end of the quarter, is now over $50 million, a new company record. After generating approximately $20 million in bookings in our first -- in our fiscal first half, we're already 2.5x that in second half bookings and now expect to come in on the high side of the $60 million to $80 million in second half bookings I mentioned last quarter.

Demand continues to accelerate across both package level and wafer level burn-in driving -- driven by increasing semiconductor complexity, power requirements and deployment in mission-critical AI, networking, automotive and industrial applications. As devices become more advanced, the need for comprehensive test in burn-in is becoming essential to ensure reliability and performance. This is driving growing adoption of our solutions across multiple markets.

So let me start with wafer-level burn-in. During the quarter, we continued to make progress in growing our installed base and expanding to new customers with our wafer level burn-in solutions. AI wafer-level burn-in is really hot right now, I guess, pun intended. We received a $14 million follow-on production order from our lead wafer-level AI accelerator processor customer for multiple new fully automated FOX-XP wafer-level burn-in systems to be used in data center training and inference applications. The order included multiple additional FOX-XP wafer-level test and burn-in systems, each configured to test 9 300-millimeter wafers in parallel along with a set of Aehr's proprietary FOX wafer -- full wafer contactors and a fully integrated FOX WaferPak auto-aligner with each system to enable hands-free operation in high-volume production. In addition, the order included multiple additional FOX WaferPak auto-aligners to upgrade the customer's existing installed base of FOX-XP systems to full automation. Aehr is the first company to successfully demonstrate and ship a wafer-level burn-in solution for AI processors.

Our FOX-XP systems configured for very high power, high current AI processors began shipping last year and provides the highest power per wafer capability available in the market, delivering up to thousands of amperes of current per wafer. This order further expands our installed base of FOX-XP systems and adds full automation across the production lines, highlighting the growing importance of wafer-level burn-in to ensure the long-term reliability of today's very high power, high current AI processors.

We're also actively engaged with multiple additional AI processor companies on benchmark evaluations and expect to make meaningful progress with those opportunities. Our benchmark evaluation program with a top-tier AI processor supplier continues to make good progress, but it's taking longer than we originally expected. This was due to a technical misunderstanding on the clock configurations, which created some challenges with the initial WaferPak designs. While we wish we had been able to catch this earlier, we're taking device data now on their wafers with the current WaferPak design and redesigning the WaferPaks to meet the new requirements. We expect to continue to provide them with additional data on this WaferPak design as well as the improved one over the next several months.

We have several other companies ranging from suppliers of data center-focused AI accelerator processors to edge AI processors and CPUs that are providing us with information on their devices and road maps and asking about our wafer-level burn-in capabilities and recommendations for burn-in of their next-generation devices. There is significant interest in doing wafer-level burn-in for devices that are expected to put in advanced packages, such as TSMC's CoWoS-based packages that include other dies such as HBM DRAM stacks, other compute AI processors and photonic or electrical-based transceiver chipsets. Waiting out bad devices before their packed together with these other devices is significantly cheaper than the yield loss if these are burned in at package level and the entire multichip package is thrown away.

For burn-in silicon photonics devices, we recently announced a major new customer win, a major new silicon photonics customer with an initial order for multiple high-power FOX-XP wafer low burn-in systems for devices aimed at the hyperscale data center optical interconnect market. This customer is developing advanced silicon photonics-based transceivers for data center networking and optical I/O applications to address the rapidly accelerating demand for high-speed fiber optic communication links in hyperscale AI and cloud data centers. These multiple systems are for both engineering qualification and high-volume production and include a FOX-XP wafer low burn-in system configured to test 9 wafers in parallel, a fully integrated WaferPak auto-aligner, multiple FOX-NP wafer low burn-in systems and multiple full sets of FOX WaferPak contactors for production, engineering and new product introduction. These systems are all scheduled to ship in this fiscal fourth quarter ending May 29, '26. They've also provided a forecast for multiple additional XP production systems over the next year as they ramp capacity to support next-generation hyperscale data center deployments. We believe this win positions Aehr to participate in what could be a significant multiyear expansion of silicon photonics production driven by the growth of fiber optic interconnects and hyperscale AI data centers.

Additionally, we received a follow-on order from our lead silicon photonics customer for both the new high-power FOX-XP wafer-level system and an upgrade of an existing system to our latest high-power fully automated configuration. We now have fully integrated our systems and aligners with their autonomous-guided robots that carry around the 300-millimeter FOP so the customer can operate in a fully lights-out hands-free operation. They, too, have given us a forecast for additional production systems as they ramp into next calendar year. As data center architecture scale to support AI, cloud computing and high-performance networking, fiber optic interconnects offer significant advantages over copper wiring, including higher data rates, lower power consumption, longer reach, improved thermal performance and reduced electromagnetic interference. These advantages are driving rapid adoption of silicon photonics transceivers across hyperscale and enterprise data centers worldwide and increasing demand for cost-effective production-proven burn-in solutions that can ensure device quality and long-term reliability at volume.

Aehr is the market leader in wafer-level burn-in for silicon photonics transceivers with a large installed base at leading global semiconductor and photonics companies. The company's -- or our FOX-XP platform enables high parallelism, high-temperature and high-power wafer-level burn-in, allowing customers to stabilize their devices, a critical manufacturing process step in the laser diode emitters for these devices, as well as to identify early life failures before packaging to significantly reduce the cost of test.

In gallium nitride and silicon carbide powered semiconductors, we've been working with our lead GaN production customer on a significant number of new devices aimed at multiple markets that include automotive, intermediate -- conversion, data center and electrical infrastructure. This continues to be a great partnership, and we continue to work on and believe we have solved the key challenges with full wafer burn-in of GaN devices on silicon. Wafer-level burn-in of their GaN devices for both qualification and production burn-in is an extremely valuable capability that is critical to their road map and plan, and we're both very excited to see them meet their growth projections.

We continue to see GaN and silicon carbide power semiconductors is critical to the electrification of the world's infrastructure in addition to key market opportunities such as data center power delivery, electric vehicles and charging infrastructure. We won a new customer in silicon carbide this quarter with a company in Taiwan, focused on the Asian and particularly greater EV market -- greater China EV market, sorry. They placed an order for a small configured FOX-XP system for qualification and production. Key elements of their decision included our ability to demonstrate all the capabilities they needed with our systems in Fremont, California as well as the feedback they received from customers who have data and confidence in Aehr's wafer-level burn-in systems used for testing and burn-in silicon carbide wafers across a large number of silicon carbide suppliers.

We see an uptick in activity and forecast from the silicon carbide players. This makes sense as we see major OEM EV suppliers in Japan and Germany roll out a number of new EVs later this year. These EV suppliers understand the value and need for wafer-level burn-in of these 6 devices before they're put into modules containing many devices in parallel for the EV engine drive inverters. This is well understood in the industry, and Aehr is seen as the market leader and proven solution for wafer silicon carbide devices used in EV inverters by a significant number of EV suppliers. We're still convert -- conservative about forecast from customers. And while we have plenty of capacity and believe we have the world's most cost-effective and highest performance wafer-level burn-in solution on the market, we're not yet counting on significant revenue from this segment to return yet. However, it could still be a very good performing segment for us next year. We'll see.

Now let me talk about wafer-level burn-in for memory. Our engagement with a key memory supplier continues to progress with additional wafer testing just this last week. We've been able to achieve the correlation they're asking for are now in discussions about test system specifications needed for their next-generation flash memories and in particular, their high bandwidth flash devices. We hope to close on this in the next few months, which would lead to a development agreement to supply systems and WaferPaks to them after a 12- to 18-month development of our new memory optimized blades for our FOX-XP and NP multi-wafer test and burn-in platform.

But we're also now in discussions with other key memory suppliers that also produce high bandwidth memory, the new DRAM standard being used in AI GPUs in addition to standard DRAM and flash memories. The HBM memories, as I referred to, are embedded into multichip packages with advanced substrates such as the CoWoS packaging from TSMC. NVIDIA's road map is aggressively pushing toward higher capacity, faster HBM standards to address the memory wall in AI training and inference. The upcoming road map transitions from HBM 3E to 4 in 2026 and then from HBM4 and HBM5 in the following years with capacity per GPU expected to increase from 80 gigabytes in the A100 class to over a terabyte in the Rubin Ultra by 2027 for semi analysis. We are seeing the added potential for HBM insertions with our FOX multi-wafer test and burn-in system road map that extends to flash, high-bandwidth flash, DRAM and HBM memories. This is a key focus for Aehr this year to drive to an agreement to work with these customers in the development of the enhancements needed to extend our FOX systems to these markets. This is a market that we believe could drive orders in fiscal '27 with ramps in fiscal '28.

Now turning to package-level burn-in. Let me start by highlighting that we're trying to change our own vocabulary from packaged part burn-in to package level burn-in. This may seem subtle, but to give a little background, traditionally, there was one semiconductor integrated circuit per single package. The package was used to protect the die from elements and wire out to a standard pattern of pins or pads that allowed easy handling and assembly onto a printed circuit board. This pattern or pitch between pins is much, much larger than the pitch on the individual die. So contacting the devices is very different for us between our package-level and wafer-level solutions. Historically, about 20 years ago, there was a package concept called multichip packages where multiple individual die were wire bonded into a single package. This was driven at the time for size and performance. Typically, this was much more expensive and generally, this faded out in time to other smaller package sizes. Recently, in the last handful of years, there have been 3 major drivers of the need for new multichip packages, but this has been called advanced packaging or modules rather than NCPs. One driver, which is the biggest one, is that the multi-decade long trend that we referred to as Moore's Law has come to an end. This law was the number of transistors was doubling every 1.5 to 2 years, while the die size was staying the same, and therefore, costs were staying flat or decreasing. This allowed higher and higher performance, smaller die, and therefore, lower-cost die to be made via process improvements or die shrinks. This drove the industry for 40 years or so until around 2010, plus or minus, when shrink started to slow materially. Then as several applications such as AI processors, extremely high-density memory such as flash and DRAM, power semiconductors were being driven by massive markets such as data center, AI and electric vehicles, the extremely high value and need for multiple devices in the same package came to fruition. This time, it was functionality and feasibility that drove this. We now refer to these devices in 2 camps, really 3 camps: wafer level, die level and package level, where package level includes both single die package and also multi-chip modules or advanced package, multi-die packages such as those found in AI GPUs with HBM DRAM stacks, multi-stack flash SSDs and also multi-die silicon carbide modules for EV inverters and charging infrastructure. At least I hope this helps as we talk through this and make it more clear what the difference is between wafer-level and package level. You may catch me still saying package part at times as old habits are hard to break, but we'll try to refer to these as package level from now on.

Okay. During the quarter, we announced a key production win with our lead package-level hyperscale customer. This customer is a premier large-scale data center provider and selected Aehr for production burn-in of their next-generation significantly-higher-power AI processor with an initial production order of our high-power Sonoma systems. This next-generation AI ASIC is expected to move to production later this year and is believed to be even higher volumes than the first device that this customer is ramping our Sonoma systems on right now. We also expect a significant near-term follow-on order from this customer for package-level burn-in systems to support their high-volume manufacturing of their custom AI processors today, the current one used in data center training and inference. They are forecasting a substantial expansion of Sonoma systems purchases beginning in the second half of calendar 2026 and continuing into '27.

We believe it's likely that there is overlapping ramps between the current and next-generation devices, which should significantly expand both our installed base and long-term consumable opportunity with this customer. We're also engaged with multiple potential customers for package-level qualification test of AI accelerators, ASICs network processors and edge AI processes for automotive and robotics. These engagements also represent opportunities to move to production burn-in over time. And interestingly, about half of these have also expressed interest in wafer-level burn- in addition to our package-level bb solutions.

Yesterday afternoon, in fact, we received an order from a brand-new customer for Sonoma to be used for reliability qualification of their new AI processor, but they may also do production burn-in with this device, which they can do with the exact same platform using Sonoma. This momentum reinforces our leadership in high-power burn-in for AI processors. The broader demand environment remains very strong. Industry forecasts indicate that hyperscale data center capacity expected to nearly triple by 2030, driven by both new builds and upgrades to existing infrastructure. This is driving substantial growth in high-performance semiconductors and in turn, demand for advanced burn-in solutions. As we've noted before, as our installed base of systems continues to grow, our consumables, which includes our WaferPak full-wafer contexts just for wafer-level and our burn-in board and modules for package-level burn-in can continue to grow beyond our systems. While this year has been lighter in terms of consumable sales, particularly WaferPaks, we believe it's an outlier. Some customers had bought systems ahead of the need and have grown into capacity, and this seems to be running its course. We believe, over time, our consumables business will consistently be at 30% or more of our total revenue, and our margins will increase as sales of these value-add consumables grow.

To support growing demand, we're continuing to scale manufacturing capacity. In addition to our Fremont expansion, this quarter, we'll begin shipping Sonoma systems from one of our current contract manufacturers, adding capacity of more than 20 additional Sonoma systems per month. This meaningful increase -- this meaningfully increases our ability to support future growth. With expanding AI infrastructure deployments and our recent manufacturing capacity enhancement, we believe we're well positioned to support significant growth both in our wafer-level and package-level burn-in systems as customers ramp production.

With strong second half bookings so far and a strong funnel of additional orders expected this quarter, we believe we're well positioned to exit the fiscal year ending May 29 with a strong backlog and deliver significant revenue growth in fiscal '27. We currently expect full year fiscal '26 revenue to be on the high side of the $45 million to $50 million range provided last quarter. We also expect our bookings for the second half of the fiscal year to be on the high side of the $60 million to $80 million range provided last quarter. More broadly, we believe we have a clear path to sustain long-term growth as our installed base expands across AI, silicon photonics, power semiconductors, memories and other high-performance applications.

As semiconductor performance and reliability requirements continue to rise, burn-in is becoming increasingly critical across a growing set of applications. We believe Aehr is uniquely positioned as the only provider offering both wafer-level and package-level burn-in solutions at scale.

With that, I'll turn it over to Chris.

Thank you, Gayn, and good afternoon, everyone. I'll begin with bookings and backlog and walk through our third quarter financial performance, cash position, outlook and investor activity. The company recognized bookings of $37.2 million in the third quarter of fiscal 2026, significantly higher than the $6.3 million in the second quarter as we have received multiple purchase orders for FOX systems, WaferPak and several auto aligners from different customers for AI, silicon photonics and silicon carbide applications. At the end of the quarter, our backlog was $38.7 million. During the first 5 weeks of the fourth quarter, we received an additional $12.2 million in bookings. This increase was driven primarily by major new Silicon Photonics customer for wafer-level burn-in with an initial order for multiple FOX systems for both engineering qualification and high-volume production, which we recently announced.

With these recent bookings, our effective backlog, which includes our quarter-end backlog plus additional bookings received since the end of the third quarter has now grown to a record of $50.9 million, providing strong visibility for the remainder of fiscal 2026 and positioning us for significant growth for fiscal 2027. Our strong bookings include increased demand for both wafer-level and package-level burn-in solutions. We believe this reflects the proven value of these differentiated solutions which are increasingly integral to the production and reliability strategies of our customers in the AI, data center and other key markets we serve.

Turning to our Q3 performance. While we did not provide quarterly guidance, our third quarter revenue of $10.3 million was in line with internal expectations due to delayed orders. Q3 revenue was slightly below consensus and down 44% from $18.3 million in the prior year period. The decline was primarily driven by lower shipments of FOX systems and WaferPaks for wafer-level burn-in business, partially offset by stronger demand for our Sonoma systems and BIM from our hyperscale customer.

Contactor revenues, which include WaferPaks, while wafer-level burn-in business and BIM and -- for package-level burn-in business totaled $3 million, representing 29% of total revenue in the third quarter. This compares to $5.9 million or 32% of revenue in Q3 last year. Non-GAAP gross margin for the third quarter was 36.5% compared to 42.7% a year ago. The year-over-year decline reflects lower overall sales volume and a less favorable product mix as last year quarter included a higher proportion of high-margin WaferPak revenue. Non-GAAP operating expenses in the third quarter was $6.3 million, flat from $6.3 million in Q3 last year. We continue to invest significant resources in our AI benchmark and memory projects. During the quarter, we recorded an income tax benefit of $0.8 million, resulting in an effective tax rate of 19.9%. Non-GAAP net loss for the third quarter, which excludes the impact of stock-based compensation and acquisition-related adjustments, was $1.5 million or a loss of $0.05 per diluted share compared to net income of $2 million or $0.07 per diluted share in the third quarter of fiscal 2025. Non-GAAP net loss for the third quarter exceeded consensus by $0.02.

Turning to cash flow. We used $3.7 million in operating cash during the third quarter. We ended the quarter with $37.1 million in cash, cash equivalents and restricted cash, up from $31 million at the end of Q2. The increase was primarily due to proceeds from our at-the-market, or ATM, equity program. During the third quarter of fiscal 2026, we raised $10.5 million in gross proceeds through the sale of about 269,000 shares. Since the end of Q3, we raised another $19.5 million gross proceeds through the sale of about 477,000 shares. And with the $9.9 million we raised in Q2, we have now fully utilized $40 million available under the ATM and have sold over 1.13 million shares at an average price of $35.38.

We also announced this afternoon that we'll be changing our fiscal year from the last Friday of May to the last Friday of June effective after our fiscal year ends on May 29, 2026. Our new fiscal year 2027 will begin on June 27, 2026, and end on June 25, 2027, continuing with the 4-4-5 calendar. As a result, we will have 1 month of financial results from May 30, 2026, to June 26, 2026, which will be reported as a transition period when we file our quarterly form on 10-Q in the first quarter ending September 25, 2026. We believe our new fiscal year will align more closely with the reporting periods of our customers and our peers in the semiconductor test equipment industry.

Moving to our outlook. For the full year fiscal 2026 ending on May 29, 2026, we currently expect total revenue to be on the high side of the $45 million to $50 million range provided last quarter and non-GAAP net loss per diluted share to be between negative $0.13 and negative $0.09 for the full fiscal year. We expect our gross margin to improve as our manufacturing activity increases to support higher sales volume and better absorb our fixed costs. We also expect to return to profitability on a non-GAAP basis in the fourth quarter of fiscal 2026.

Lastly, looking at Investor Relations calendar. Aehr Test will be participating in 2 investor conferences over the next couple of months. We'll be meeting with investors at the Craig Hallum Institutional Investor Conference taking place in Minneapolis on May 28, and we'll be presenting a meeting with investors on June 2 at the William Blair 46th Annual Growth Conference taking place in Chicago. We hope to see some of you at these conferences.

That concludes our prepared remarks. We're now happy to take your questions. Operator, please go ahead.

Thank you. At this time, we will be conducting a question-and-answer session. [Operator Instructions] Our first question comes from Mark Shooter with William Blair. Chris,

You have Mark Shooter here for Jed Dorsheimer. Congrats on all the progress, especially with the hyperscaler. I'm curious how you guys are looking at this internally? And what percentage of GPUs or ASICs or XPUs do you think are burned in today? And how do you guys size the vector space?

That's really a good question, and I think we're still getting our arms around a little bit here. I would say that we've been a little bit surprised at how many devices are not yet doing production burn-in. One of the things that we mentioned it strategically when we purchased in Cal what 18 months ago or so, Intel does a type of burn in and they were known for it called qualification reliability burn-in, which all processors go through, in fact, all semiconductors. It's what determines their lifetime reliability specs and that they will last long enough, et cetera. So sort of a onetime deal, you do with a large number of devices to do the statistics on it.

Then certain devices go through a screening in production to weed out infant mortalities because the failure rate is higher than the market will bear, okay? So Intel was doing this with a large number of AI customers. But actually, prior to that, wasn't doing any production burn-in. When we acquired them, we've now -- because of the capacity we have in terms of people and infrastructure, we've been able to capture this large hyperscaler and are engaged with multiple others. But one of the things that I've been surprised at is that how many of the, I guess, particularly, the ASIC suppliers don't do production burn-in yet or are talking about doing it. And that goes for a lot of different devices that are out there from edge, robotic, ASIC, network processors and even -- always be careful at GPU because everybody just associates GPU only with NVIDIA. But not all devices are burnt in still today. And so there are certain ones that are, there are certain ones that aren't. And even within a company, they may have some of their products are burnt in and others aren't. However, the common theme is they're all moving to burn-in.

The data is out now that there's solutions out there like Sonoma or the wafer lower burn-in of our FOX system that can cost effectively do it. And so now there's a very viable alternative to doing it at the system level or the RAC level. We've said in the past that many of these guys would actually build it all the way to the RAC and then at the system integrator, they would burn it in for a week or 2 and weed out the infant mortality to ship it or in some cases, with the ASIC suppliers, they just ship it into their data centers and dealt with the fallout.

So it's growing. I'm trying to think if I try and put a percentage. I think on ASICs, it might be by -- you like SKU, I mean, I don't know if it's 20%, maybe it's 5% of the -- so most ASICs are not printed. I would say on the AI accelerators that are out there across the wide variety, maybe half. But then what's happening is the processors are getting higher power from generation to generation and breaking all the tools that are out there. So even the tools that were out there, and I'm not giving any inside information whatsoever, but just what's classically understood, like NVIDIA's processors of couple generations ago compared to their current ones, their power is substantially more, which would require new tools. And the ones that they're working on and others in a year and out -- and again, just what's publicly available, break the current tools. And so there's a continuous road map. And so even within our Sonoma platform, we're continuing to add capabilities. It's one of the key features we have is the ability to adapt it and add higher and higher current and power as you go forward.

So how many times you hear a CEO say, you're at the early innings, but this is still at the kind of the beginning phases of this. And over time, people will be buying a lot more burn-in systems as a percentage, meaning to cover the percentage of total and then just ensure quantity.

I appreciate all the color, Gayn. That's very helpful. To zero in a bit on your hyperscaler customer, can you bring us a little into the room a bit here and what was the decision process to go with package-level right now package part market level versus wafer level? And do you see a transition potentially with this customer to move to wafer level? And if you get a new customer, is there -- do you think that makes the same decision? Or is there a track towards wafer level to try to help us out with that?

Okay. So to be fair, 2, 3 years ago, if you would have asked me, we said -- I've said this before, can you do wafer-level burn-in of AI processors, I think we would have said absolutely not. We didn't have the power and the system, and the belief was that there weren't the test nodes that we now understand there are to be able to do it. And now as we've gone from customer to customer across a wide variety, there's commonalities about it that allow us to be able to confidently tell them we can do wafer-level burn-in. So prior to that, it was whether you did package-level burn-in or not or did at say, the rack level, okay? so people first step is, do I do burn in, then they're going to default to thinking I'm going to do it at the package level. But then what we're seeing, and I mentioned this before, we have customers -- I don't want to get too carried away here, but the last 2 customers that we're in, in the last 2 weeks, Alberto is our package-level burn-in VP and Vernon really runs kind of the wafer-level side of things. The customer will come in and say, I want to talk about package level, and about halfway through the tour, they're like what is that? We talk about wafer level. They're like, whoa, whoa, whoa, how do I do that? And so we kind of joke about it around here. It's like. But the reality is, we don't care which side you go to. We have both.

Specifically, on the hyperscaler and I've said this out loud before, the first device they ran with us, it's not their first device, but it's the first one they went to production on is on Sonoma. Their second device, they just awarded us with production for that one and are planning the ramp of that with us right now. They are already on the road map talking about the third device, and they've asked us about the DFT to specifically put into the third device because they would like to consider that for wafer level on our FOX systems.

So I think that's sort of a progression that we will see. And I would actually imagine large customers that have multiple different product lines, some they would do wafer level on and some they might do package level on. It becomes particularly valuable when you have a -- like a package that has multiple processors in it and all the HBM memory, right? So in those particular ones, I mean, the co-op substrate is more expensive than the silicon itself or the processor, which sounds crazy. So they would be very interested in doing the wafer-level to screen out the die before they have to throw away everything else. So I think there's a progression over time where people will move towards wafer-level on the things they can default to package-level where they can't.

Next question comes from Christian Schwab with Craig-Hallum.

Thanks for a tremendous amount of detail regarding the different target markets and your success in each one of them. The most common question I receive is, is there a way to gauge over a multiyear time frame? Obviously, you gave guidance for this year in support of substantial growth the following year with bookings in hand and others to come. But as -- if you had enough time to give some thought to the range of potential outcomes over a multiyear time frame that you guys could do in combination of your target markets and potential entry into the market -- memory market down the road.

So the short answer is we have. The long answer is it's -- we're just really cautious about trying to get too carried away with our projections. But the numbers are very significant. If you just -- because particularly now that there's some [indiscernible] memory kind of angle on this thing, too. If you look at the dollar spend that people are going to do on whether you call it compute or AI or if you look at the compute capability, right, that are going into training and inference in data centers, inference and edge, automotive, robotics, the number of different applications and the way people are using it and deploying it, the amount of silicon wafers is staggering and why people talk about these enormous dollars. Those devices -- a processor has always been burnt in. I want to -- it feels like I'm contradicting what I said earlier. It's widely known that Intel and AMD, the primary processor suppliers of the world, burnt in every one of their processors and always have, right? When the first GPUs were coming out, those were using graphics, they were not burnt in. And the initial people that are all related to AI are our foundries and they're out looking for burn-in capability. There were no burn-in systems in the foundry OSAT models. And so people weren't spending on. They spent enormous amounts of money on test and it's growing. And they're going to be spending a significant portion of their test budget on burn-in going forward. I hear things -- I mean, I hear it constantly from the customers rotating through. So the TAMs are multi-hundreds of millions of dollars for package-level burn-in. Wafer-level burden, if you say it displaces package-level is even higher. The average actual price per unit time of wafer-level is actually more expensive than package-level. But the yield pays for all of it. And so it's cheaper to the customer to spend more money. And so the TAMs are larger there. If you look at the memory side of things, if you look at the memory spend of the number of fabs that are coming out in the next in 5 years, what percentage of budget is for their test budget, it -- these are big numbers. And so the spend is -- in burn-in is probably total spend measured in multiple billions of dollars per year in the next couple of years on an annual basis. And the question is, well, then wait a minute, how come you guys aren't $500 million? And the answer is we think that we have a very good opportunity to significantly grow our package-level and wafer-level business across the biggest segments that are driving burn-in and one of the reasons we're leading with putting infrastructure and capacity in place to be able to have the conversations we're having these customers that are throwing out some really big numbers.

And something -- you're going to warn me, you're getting carried away here, but it's an awesome place to be, and it's not only silicon carbide for EVs where lots of people are wondering that the EVs are ever going to make it. As you guys know the history, it's like people got ahead of themselves, and I was even saying it. It's like, come on, you guys. No one's going to be -- we're not all going to be driving EVs. But the TAMs in these segments are significantly larger than anything we ever talked about on the power semiconductor side.

Great. That gives me enough to work with. No other questions.

The next question comes from Max Michaelis with Lake Street Capital Markets.

First, I want to start out here. When you look at the demand environment from the package-level and wafer-level, the demand seems strong on both sides of the business here. But I mean, to me, it looks like wafer-level has seen some -- is outpacing on the demand side and maybe the order side. Can you let me know if I'm wrong there, but anything else you can add as well.

The challenge with our business and for all of our shareholders is we know how to be lumpy. And by having more markets and more customers, it can make it less lumpy. But the ASP of a production order set in wafer-level burn-in can be $10 million to $20 million in an order, let's say, okay? Package-level can be that big or bigger, too. okay? So when they come in, it looks like, oh, right now, we see demand on both significant. Now the engagement and the work to get away for level burn-in is definitely harder than package level. And the obvious reason is, in many cases, we're already testing the part for the on our tool. So now they have to just say, oh, I need to buy a whole bunch of them and add automation and go to production. Does that make sense? On wafer-level, what we found is that there's a learning process by both sides a little bit, but to understand how they can use our tool to be able to test their part. And in some cases, they're like, okay, I know if I just did this, it would make it a lot easier. But it's too late. I already taped out this part. That would be an example of this benchmark I'm in right now. It's like they're having to use some -- a little fancier WaferPak to do it. And if they just did some specific DFT, they could use a very simple WaferPak, the same WaferPak we're using for like silicon photonics or silicon carbide and some of these others. They're vocabulary with us is, oh, I'll be able to do that for the next gen, but can you just work around it with the current one? Well, it's kind of harder.

The other one, as I mentioned, I want to get a little too carried away. I mean I get pretty techy on these things. But we had a missed communication on the clock, which is something really simple candidly. But if you do them wrong, it doesn't work. And so we've had the jerry rig some stuff to actually get it to work, and we're going to spin it to make it work. Nobody is freaking out about it because this isn't rocket science, but it would be something we would never mess up again with that customer because that we now both have the same vocabulary. Second one is always easier. And so there's a little bit more startup thing with the wafer-level burn-in. But if you're technically astute and engaged and you look at it, you're not going, oh, this isn't going to work. You just go, okay, gosh, that's too bad that. Okay. Now let's keep going. And so there's a learning process. We're getting faster at it. And I think, over time, wafer-level burn-in -- like the silicon carbide or the silicon photonics customer we won this last quarter, it was just yes. I mean there was no on way for benchmark. It went from can you do it to how fast can you deliver, okay? I think that is a natural progression. You'll see it in our package level, and you'll see it in our wafer-level over time where customers will engage, they'll know we can do it, and they just say let's go.

[Operator Instructions] The next question comes from Larry Chlebina with Chlebina Capital.

Your contract manufacturer that you're starting up, when does that start? And when will it be fully capable of doing your 20 Sonomas a month?

They're -- they've already built. They're in the process of building the first batch, I would say, is the best way of looking at it. There's -- it's a little more complicated than the way I described, but there's sort of -- there's actually 2 contract manufacturers together and then one feeds into the other one. The first -- the one that feeds in the other one did their prototypes, they sent to us, we were going through a kind of an acceptance process to validate it to work out any kinks, then those go to the other contract manufacturer for final system integration and shipping. The other one is when we were out there, we visited them last September, I think, we did kind of an audit of facility power infrastructure and cleanliness and they did a kind of a remodel similar to ours if people have seen it. It's all white and fancy clean floors, more clean room space so that we can actually build these things in a clean room area. They had facilities that were doing some stuff for solar as it turns out. And so we were able to leverage from that. And that is in place now. And we think our first products would be ready to ship to customers this quarter through May. And what we want to make sure is they're ready to go by late summer when we see the Sonoma ramp hitting.

That was the really my question. Are you keeping any capacity? Or are you planning on producing those systems in Fremont as well or is...

Yes, for sure. But this is in addition to. We've kind of talked about like about a 20 system per month capacity here from an infrastructure and footprint perspective. We actually still need to hire some more people, maybe take on a shift. But we'll use -- we use that facility for like large volume orders of the same SKU, if you will, make it simple. And then we'll use -- we'll continue to make Sonoma systems here and all of the XPs will be built out of here, all the FOX products.

And then did I hear you say that your first expected XP sales to an HBM customer will be this calendar year or this -- or next fiscal year '27?

Yes, I didn't quite say anything. I was a little more elusive than that on purpose. What I will tell you is that we have identified some interesting opportunities with HBM, probably the new [ 4E ] that it has some interesting challenges that people would really like to do this wafer-level burn-in on. And between our FOX system as it stands and the road map that we've been working on, as people know, with a team of people here for a memory extension to the FOX system to add what we would call channel modules into the FOX that make it memory focused, we think that there's some real overlap there. That just as you know, Larry, you follow this a lot. That's an uptick, okay? I thought I had a last -- and it is in parallel with flash now.

I would say that would be an uptick. Yes. a little bit of an uptick.

Would be a good uptick. I'll agree with you. But right now, I'm excited about the discussions.

Yes. So the flash engagement, is that -- do you think that will bear fruit on the enterprise side here shortly before HBF gets underway, the effort that you're going to [indiscernible]...

That's a good question. I think it really is up to the customer kind of the timing of what we would build would be something that would be a superset that could do both. So yes, if HBF were delayed a little bit, maybe we would intercept their standard products. They've asked us to build it. The definition discussion has been to do both. In some ways, HBF is easier, okay? Then -- because if you start saying it's all flash, a lot of times what happens is people say, well, I want to be able to test everything I've ever had before. And then as the interfaces evolve, they tend to converge in voltages and speed or whatever. And if you say, well, I want legacy, it's like, well, okay, I've got to support this old voltage or something on a device you don't make anymore. So part of the challenge for us is to try and kind of converge on what do you really need going forward, where are you going to spend the money. They probably never buy a system for legacy products from us in general. So I think that's one of the challenges we get to work through.

That's all I had. That -- boy, you got a lot of hires of fire.

It is so much fun, you guys, I'm telling you. You -- yes, the -- Vernon and Alberto and the R&D teams and the poor Nick, our WaferPak team is very busy right now. And we're doing some things to offload that adding additional resources. We're hiring anybody looking for a great job with a company that's growing, let us know. We've got a lot of reqs out there, and we're looking for great people. So it's...

It sounds like it is a lot of fun and congratulations. I know you've been working at it for a good while to get to this point.

Thanks, Larry.

[Operator Instructions]

All right, operator, if there's no other questions, we'll end on a really happy note. And as always, if you guys have any questions, please feel free to reach out to us. If you happen to be in the Bay Area and want to try and stop by, we're always happy to give a short tour to key investors and things like that. And we look forward to a great quarter and talking to you next quarter. I guess with our new fiscal year, now as our quarterly earnings will be the same time the next time, and then there'll be a I guess, a 1-month push or something like that, but it should work out. This will be a good thing for our customers, which, honestly, that's the key to all of this. All right. Thank you very much, folks. Bye-bye.

Thank you. This concludes today's conference, and you may disconnect your lines at this time. Thank you for your participation.

Greetings. Welcome to the Aehr Test Systems Fiscal 2026 Second Quarter Financial Results Conference Call. [Operator Instructions] Please note, this conference is being recorded. I will now turn the conference over to your host, Jim Byers of PondelWilkinson, Investor Relations. You may begin.

Thank you, operator. Good afternoon, and welcome to Aehr Test Systems Second Quarter Fiscal 2026 Financial Results Conference Call. With me on today's call are Aehr Test Systems' President and Chief Executive Officer, Gayn Erickson; and Chief Financial Officer, Chris Siu. Before I turn the call over to Gayn and Chris, I'd like to cover a few quick items. This afternoon, right after market closed, Aehr Test issued a press release announcing its second quarter fiscal 2026 results.

The release is available on the company's website at aehr.com. This call is being broadcast live over the Internet for all interested parties, and the webcast will be archived on the Investor Relations page of the company's website. I'd like to remind everyone that on today's call, management will be making forward-looking statements that are based on current information and estimates and are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements.

These factors are discussed in the company's most recent periodic and current reports filed with the SEC. These forward-looking statements, including guidance provided during today's call, are only valid as of this date, and Aehr Test Systems undertakes no obligation to update the forward-looking statements. Now with that, I'd like to turn the conference call over to Gayn Erickson, President and CEO.

Thanks, Jim. Good afternoon, everyone, and welcome to our second quarter fiscal '26 earnings conference call. I'll begin with an update on the key markets we're targeting for semiconductor test and burn-in with a particular focus on the common growth drivers we're seeing across these markets, which is namely the massive explosion of AI and data center infrastructure.

After that, Chris will walk through our financial performance for the quarter, and then we'll open up the call for questions. While second quarter revenue was softer than anticipated, we made significant progress in both wafer-level burn-in and packaged-part burn-in segments and are very excited about our prospects moving forward. Based on customer forecasts recently provided to Aehr, we believe our bookings in the second half of this fiscal year will be between $60 million and $80 million, which would set the stage for a very strong fiscal '27 that begins on May 30.

During the quarter, we made substantial progress with wafer-level burn-in engagements and production installations across AI processors, flash memory, silicon photonics, gallium nitride and hard disk drives. We're encouraged to see that one of our key growth strategies focused on reliability solutions for the exploding demand for AI and data center infrastructure is beginning to bear fruit. In packaged-part burn-in, we secured key new device wins for our Sonoma system supporting high-temperature operating life qualifications for AI devices.

These wins are expected to drive additional capacity at test houses, including at least one customer that has elected to move into production in late calendar '26, which we believe could result in meaningful volumes of Sonoma production systems. In addition, in the last month, we received a very large forecast from our lead Sonoma production customer for AI ASIC production capacity. This forecast is expected to drive very strong and potentially record bookings for the company this fiscal year and position us well for significant revenue growth next fiscal year with their requested shipments starting in the first fiscal quarter of our next fiscal year.

Taken together, our increased visibility across multiple end markets gives us great confidence in our outlook. As a result, we're reinstating financial guidance in fiscal '26, which we'll touch on later in today's call. Now let's talk about our key segments. Starting with our wafer-level burn-in during the quarter, we expanded engagements and completed additional production installations across several end markets.

Our lead AI wafer-level burn-in customer continues development of its next-generation processor and is currently discussing additional capacity with us. They're forecasting additional system and WaferPak capacity orders this fiscal year and plan to transition to our fully integrated automated WaferPak aligner for 300-millimeter wafers. We expect this customer to continue scaling and excited to support their growth. We also announced a strategic expansion of our partnership with ISE Labs during the quarter to deliver advanced wafer-level test and burn-in services for next-generation high-performance computing and AI applications.

This partnership accelerates time to market, improves performance and gives customers the option of either packaged-part or wafer-level test and burn-in for their production volumes. ISE, together with its parent company, ASE, represents the world's leading outsourced semiconductor assembly and test or OSAT platform, serving a global roster of top-tier semiconductor customers.

As part of our benchmark evaluation program with a top-tier AI processor supplier we announced last quarter, we completed development of our new fine-pitch WaferPaks for wafer-level burn-in of high-current AI processors. These are currently in test with this potential customer's processors and are designed to validate our FOX-XP production systems for wafer-level burn-in and functional test of their high-performance, high-power AI processors.

We're currently completing start-up procedures such as power-up sequencing, thermal profiling, test vectors, timing and high-speed differential clocks and expect to complete data collection this quarter. While we're demonstrating our new fine-pitch high-current WaferPaks for this benchmark, many customers can utilize lower-cost WaferPak designs if certain design for test rules are incorporated upfront. These approaches reduce cost and lead time and are especially attractive to customers focused on faster time to market for wafer-level high-temp operating life qualification.

We also have 2 additional AI processor companies planning wafer-level benchmark evaluations since last quarter's earnings call. These benchmarks typically take about 6 months, and we expect to make meaningful progress beginning this quarter. Both customers are evaluating wafer-level test and burn-in as an alternative to packaged-part or system-level test for large advanced AI modules that combine multiple AI accelerators and stacked high-bandwidth memory.

Moving burn-in upstream to the wafer-level significantly reduces cost and yield risk by avoiding scrapping expensive substrates and memory stacks when early failures occur later in the process. We have seen estimates that show the cost of the substrate is more than a single processor and the cost of the high-bandwidth memory is even higher. Turning to flash memory. We completed our wafer-level benchmark with a global leader in NAND flash just prior to the holidays. The customer has now taken the wafers back for further processing to validate correlation with their internal process.

This benchmark demonstrated our ability to test flash memory wafers with significantly higher parallelism and power than is possible using traditional probers and group probers from companies such as TEL or ACCRETECH. We've also proposed a next-generation solution enabling test of a new emerging flash memory device called High Bandwidth Flash or HBF, designed for AI workloads. This proposed solution leverages our FOX-XP platform, WaferPaks and auto-aligner technology and would support single touchdown high-power test on 300-millimeter wafers.

While development of this system would take over a year following customer commitment, we believe this represents a compelling entry point into a large and evolving memory market. We look forward to sharing more details as this progresses. Turning to silicon photonics. We believe that silicon photonics is used -- we believe that silicon photonics used in data center and also chip-to-chip I/O is going to be a significant market driving production burn-in capacity for our FOX wafer-level burn-in systems and WaferPaks.

Our lead customer has now firmed up its production ramp, which we expect to begin early next fiscal year. While this timing is later than previously expected, it aligns with recently announced AI processor platforms and positions us well for calendar 2026 orders and deliveries in fiscal '27. We've also finalized a forecast with another major silicon photonics customer initially targeting data center applications with a road map toward optical I/O.

We expect to book their initial turnkey FOX system soon with delivery planned for May of this year. In gallium nitride power semiconductors, we continue to support our lead production customer, though we experienced delays related to unanticipated high-voltage fault conditions that required WaferPaks and protection circuit redesigns.

This delayed approximately $2 million in WaferPak shipments from last quarter into this quarter, along with some in-system -- along with some system enhancements. Shipments have now resumed and lessons learned have significantly strengthened our GaN power supply burn-in capability. If anyone tells you that testing and burning-in full wafers of GaN power semiconductors with up to 600 volts or more is easy, don't listen to them.

We also continue to engage with multiple new potential GaN customers and are developing WaferPaks for several new device designs that are expected to go to high-volume production for applications like data center infrastructure and power delivery, automotive electrical power distribution on both ICE and hybrid electric vehicles and even power semiconductors used for electrical breakers.

Aehr has a unique solution that can deliver full turnkey, fully automated wafer handling and probing for test and burn-in of GaN wafers in sizes from 6 to 8 inches and even 12 inches or 300-millimeter wafers. Turning to silicon carbide. As we previously discussed, silicon carbide demand has been weighed toward the end of this fiscal year. Customers continue to be optimistic about this market and their capacity needs.

But we've tried to take a very conservative stance that is mostly show us the orders before we believe them. Our lead customer recently transitioned from 150 millimeters to 200-millimeter wafers, nearly doubling output without adding new FOX-XP systems and supported by Aehr's proprietary WaferPaks that we developed to accommodate both 150 and 200-millimeter wafers contacting 100% of the die on each in a single touchdown.

They're now seeing additional needs for WaferPaks this year, but additional capacity for systems appears to be a year out. We pushed out expected orders until next fiscal year from our near-term forecast, but have capacity of systems or WaferPaks to continue to support their surge capacity needs as well as our other silicon carbide customers. While electric vehicle-related demand has slowed industry-wide, we remain well positioned with the most competitive wafer-level burn-in solution available, and we expect to benefit when growth resumes.

In semiconductors used in data center hard disk drives, we're installing the additional FOX-CP systems for a major supplier of hard disk drives for wafer-level burn-in of their special components in their drives. They've indicated plans for additional purchases later this calendar year.

While their device unit volumes are very large, the overall revenue opportunity remains modest due to short stress times and the massive parallelism achieved on our FOX-CP system and proprietary high-power WaferPak wafer contactors. Now let me talk about packaged-part burn-in. We're seeing continued momentum in packaged-part qualification and production burn-in for AI processors, driving growth in our new Sonoma ultra-high-power packaged-part burn-in systems and consumables.

As we announced today in a separate press release, during our fiscal third quarter to date, we have received orders from multiple customers totaling more than $5.5 million for our Sonoma ultra-high-power packaged-part burn-in systems, including initial orders from a premier Silicon Valley test lab for our newly introduced higher-power configured Sonoma system that can also support full automation.

These orders already exceed the total Sonoma orders for the entire second quarter, highlighting the accelerating demand we're seeing for our package-level burn-in of high-powered AI and compute devices. This quarter, we also secured key new device wins on the Sonoma platform for high-temp operating life qualification. These wins are expected to drive additional capacity at test houses, with at least one customer planning to transition to production later this calendar year, generating significant system demand.

Our lead packaged-part burn-in production customer for AI processors continues to ramp and is forecasting substantial growth in 2026 and beyond. Although we have not yet received the purchase order, we have received a substantial forecast from this customer for AI ASIC production capacity with requested Sonoma production, packaged-part burn-in system and BIM shipments beginning in the fiscal first quarter of '27. That starts May 30, which we expect to contribute to very strong bookings in fiscal '26 and generate significant revenue growth in fiscal '27.

This customer also plans to introduce much higher power ASICs later this year for which we are already developing the high-temp operating life qualification burn-in modules and sockets to be used on the Sonoma systems at one of the premier Silicon Valley test services companies that have many systems installed. This AI accelerator ASIC processor is also forecasted to go to production burn-in and drive even higher volume needs for production burn-in systems downstream at the OSATs in Asia.

We feel we're very well positioned with our Sonoma system for this production capacity need and believe this could drive very substantial volumes of Sonoma systems in our next fiscal year. During the quarter, we completed development of a next-generation fully automated higher-power Sonoma system, supporting up to 2,000 watts per device.

This system enables continuous flow operation, improved throughput and seamless transition from qualification to high-volume production using the same fixtures and sockets. These capabilities enable customers who are focused on high-temp operating life reliability testing to have a system that is fully software and hardware compatible with the Sonoma systems they have installed, which simplifies and accelerates time to market that is critical for HTOL testing of new AI processors.

This Sonoma burn-in system can also simply bolt on a fully automated handler developed and sold by Aehr Test as a turnkey solution to allow hands-free operation with less than a couple of minutes of overhead per burn-in cycle, which is amazing for production burn-in needs. We're also seeing increased demand for our lower-power Echo and Tahoe packaged-part burn-in systems, driven by our installed base of more than 100 systems across over 20 semiconductor companies worldwide.

But I'll wait for another call to discuss these systems and the markets they serve in more detail. As stated last quarter, the rapid advancement of generative AI and the accelerating electrification of transportation and global infrastructure represent 2 of the most significant macro trends impacting the semiconductor industry today. These transformative forces are driving enormous growth in semiconductor demand while fundamentally increasing the performance, reliability, safety and security requirements of the devices used across computing and data infrastructure, telecommunications networks, hard disk drive and solid-state storage solutions, electric vehicles, charging systems and renewable energy generation.

All these -- as these applications operate at ever higher power levels and an increasingly mission-critical environments, the need for comprehensive test and burn-in has become more essential than ever. Semiconductor manufacturers are turning to advanced wafer-level and package-level burn-in systems to screen for early life failures, validate long-term reliability and ensure consistent performance under extreme electrical and thermal stress conditions.

This growing emphasis on reliability testing reflects a fundamental shift in the industry from simply achieving functionality to guaranteeing dependable operation throughout a product's lifetime. A requirement that continues to expand alongside the scale and complexity of next-generation semiconductor devices. This year, we're making significant progress expanding into additional key markets for our semiconductor test and burn-in solutions, including AI processors, gallium nitride power semiconductors, data storage devices, silicon photonics integrated circuits and flash memory.

This diversification of our markets and customers is significant given our revenue concentration in silicon carbide for electric vehicles the last 2 years. This progress and key initiatives expands our total addressable market, diversifies our customer base and provides us with new products, capabilities and capacity, all aimed at driving revenue growth and increasing profitability. The progress we made this quarter with a significant number of customer engagements and production installations provides improved visibility into future demand.

As a result, we're reinstating guidance for the second half of fiscal '26. For the second half of fiscal '26, which began November 29, '25 and ends this May 29, '26, Aehr expects revenue between $25 million and $30 million. As stated earlier, although we're not providing formal bookings guidance, based on customer forecast recently provided to Aehr, we believe our bookings in the second half of this fiscal year will be much higher than revenue between $60 million and $80 million in bookings, which would set the stage for a very strong fiscal '27 that begins on May 30, 2026.

With that, let me turn it over to Chris, and then we'll open up the lines for questions.

Thank you, Gayn, and good afternoon, everyone. I'll begin with bookings and backlog, then walk through our second quarter financial performance, cash position, outlook and investor activity. The company recognized bookings of $6.2 million in the second quarter of fiscal 2026 compared to $11.4 million in the first quarter. At the end of the quarter, our backlog was $11.8 million.

Importantly, during the first 6 weeks of the third quarter, we received an additional $6.5 million in bookings. This increase was driven primarily by an order from a premier Silicon Valley test lab for our newly introduced high-power configured Sonoma system, which we announced this afternoon. Including these recent bookings, our effective backlog has now grown to $18.3 million, providing increased visibility as we move through the remainder of fiscal 2026.

Turning to our second quarter results. Revenue was $9.9 million, down 27% from $13.5 million in prior year period. The decline was primarily driven by lower shipments of WaferPaks, partially offset by stronger demand for our Sonoma systems from our hyperscaler customer. Contactor revenues, which include WaferPaks for our wafer-level burn-in business and BIMs and BIBs for our packaged-part burn-in business totaled $3.4 million, representing 35% of total revenue. This compares to $8.6 million or 64% of revenue in the second quarter last year.

Non-GAAP gross margin for the second quarter was 29.8% compared to -- with 45.3% a year ago. The year-over-year decline reflects lower overall sales volume and a less favorable product mix as last year's quarter included a higher proportion of higher-margin WaferPak revenue. Non-GAAP operating expenses in the second quarter were $5.7 million, down 4% from $5.9 million in Q2 last year. The decrease was primarily due to lower personnel-related expenses, which were partially offset by a high research and development costs, including high project spending as we continue to invest resources in AI benchmark initiatives and memory-related programs.

As previously announced, we successfully closed the Incal facility on May 30, 2025, and completed the consolidation of personnel and manufacturing into Aehr's Fremont facility at the end of fiscal 2025. During the quarter, we negotiated an early lease termination with the landlord, reducing our obligation by 5 months of rent. As a result, we recorded a reversal of $213,000 related to a previously accrued onetime restructuring charge.

During the quarter, we recorded an income tax benefit of $1.2 million, resulting in an effective tax rate of 27.3%. Non-GAAP net loss for the quarter, which excludes the impact of stock-based compensation, acquisition-related adjustments and restructuring charges was $1.3 million or negative $0.04 per diluted share compared to net income of $0.7 million or $0.02 per diluted share in the second quarter of fiscal 2025.

Turning to cash flow. We used $1.2 million in operating cash during the second quarter. We ended the quarter with $31 million in cash, cash equivalents and restricted cash, up from $24.7 million at the end of Q1. The increase was primarily due to proceeds from our at-the-market equity program. As a reminder, in the second quarter of fiscal 2025, we filed a new $100 million S-3 shelf-registration that was approved by the SEC for 3 years, followed by an ATM offering of up to $40 million.

During the second quarter of fiscal 2026, we raised $10 million in gross proceeds through the sale of about 384,000 shares. At quarter end, $30 million remained available under the ATM. We intend to utilize the ATM selectively with a disciplined approach focused on market conditions and shareholder value. Looking ahead to the second half of fiscal 2026, which began on November 29, 2025, and ends on May 29, 2026, we expect total revenue between $25 million to $30 million and non-GAAP net loss per diluted share between negative $0.09 and negative $0.05 for the 6-month period.

On the Investor Relations front, last month on December 17, 2025, Lake Street Capital initiated analyst research coverage on Aehr Test, along with equity research firm, Freedom Broker, which initiated coverage last June. There are now a total of 4 research firms covering the company. Lastly, looking at the Investor Relations calendar. We will meet with investors at the 28th Annual Needham Growth Conference in New York on Tuesday, January 13, and then return to New York in February for the 15th Annual Susquehanna Technology Conference on Thursday, February 26. We will also be participating virtually in the Oppenheimer Emerging Growth Conference on Tuesday, February 3. We hope to see you at these conferences. That concludes our prepared remarks. We're now happy to take your questions. Operator, please go ahead.

[Operator Instructions] Our first question comes from Christian Schwab with Craig-Hallum.

What wasn't clear to me exactly is on the booking strength -- potential booking strength of $60 million to $80 million in the second half of this fiscal year. Is that almost entirely on the AI accelerator processor line?

There's some silicon carbide, not much, like not very much at all. There is some silicon photonics for sure. But the bulk of it is across wafer-level and packaged-part burn-in for AI processors, yes.

Okay. Perfect. And then given that such a material bookings from the AI processor market, can you give us any indication or idea? I know we've talked about the opportunity in that marketplace being bigger than silicon carbide. But let's narrow it down to kind of a multiyear time frame kind of including '27 and '28. Do you see that business after initial orders expanding meaningfully from there?

We do. We do. And we've been taking a pretty conservative stance on how large, particularly the AI and the wafer level side of it is. And I want -- conservative may not be fair. Candidly, we're still trying to get our arms around how big it is. What we get is visibility of a specific GPU or CPU or network processor or an ASIC. And then we hear these things from the customer and then we look externally and what are they telling the Street and try and correlate to those lookups.

And I'd say pretty consistently, we hear bigger numbers from the customer than the Street. I'm not sure what that all means, okay? And then as they give us test time estimates of what the burn-in conditions are, we can start to put some numbers around it. But a single processor for some of these big guys at wafer-level burn-in is 20, 30 systems or so.

And these are $4 million, $5 million machines. So you get a feel for the size of what that looks like. And the estimates of -- today, if you were to look at AI spend in test between test and burn-in, is it $8 billion, $10 billion to maybe $15 billion or so. I mean it's a really large number. So we don't want to get ahead of ourselves here. But when customers ask you things like how many can you make, right?

So can the AI business be measured in hundreds of millions of dollars for Aehr Test a few years out? Yes. for sure. Now what's interesting is that we're in this -- I think it's an awesome position to be in because our -- the Sonoma system is a highly preferred system for HTOL, the high-temp operating life reliability testing for these AI processors. It has the largest installed base in all the test houses around the world. We're getting people that approach us because we are the -- we are like -- I don't want to say we're the de facto standard, that's probably bold, but we have more capacity than everybody else.

And therefore, they are saying, you're kind of the go-to guy. I like those words. And so -- and we can build lots of them. So customers are using that, and we get a front row seat to actually bring them up. Then we say, "Oh, by the way, if you want, you can take this machine, add production handling to it and do production on it." In the meantime, if you come to our facility and you do a tour and you can see that production test cell for the Sonoma automation, we, of course, will walk you by a FOX wafer-level burn-in test cell and mention, "Oh, by the way, that happens to be doing a benchmark on a 300-millimeter wafer, we can't tell you who it is."

And so they're like, well, what is that? So we are in a position to be able to talk about both of them. And the ASPs are actually higher on the wafer-level side of things. And -- but the value proposition way outweighs that because of the yield advantage of doing at wafer level. The yield savings [ dwarfs any of the ] costs or the cost to test the wafer-level burn-in. So as we get our arms around the market, the market data that would be out there would be packaged part because no one is doing wafer level except for us.

And so we're creating our own models related to, okay, for that unit capacity, if you went to wafer-level burn-in, what would that look like? Kind of similar to what we had to go through in the original silicon carbide side of things of -- if the whole market -- and we're not seeing -- everybody including NVIDIA and Google and Microsoft and Tesla and these guys all went with us how big is that market? We haven't really tried to put our arms around that yet, but it's substantial.

Great. And then I guess one last question, if I may, and follow up on your comment about capacity. How many systems do you think you're capable of manufacturing in a year for wafer level?

We have talked to customers about capacities exceeding 20 systems a month at either package or wafer level. If we had to, we could ship 20 systems a month of each during this calendar year. Now that's bigger than our forecast by a lot. But you know what, when people are saying, could you do something like this and intercept something, it's like if they gave you an order for 50 or 100 Sonomas, like how long is it going to take you to build them? Makes sense?

Makes perfect sense. No other questions.

The next question comes from Jed Dorsheimer with William Blair.

Yes, I guess maybe just to start, on the wafer level, I think your prior comments around the timing of the benchmark, it seems like that's taken a little bit longer. And I'm just wondering, is that a function of -- is it because it's new and what you're seeing is from the customer is that they're changing parameters that's extending that out? Because I think you had maybe talked about by February time frame, and we were almost...

Do you want me to throw my customer under the bus? Is that what you're trying to tell me, but...

No, no, no...

Let me answer that. No, I got it. I got it. No, that's totally fair, okay? What I do in all of these things is try to describe exactly what we feel, what we know, what we knew at the time. This -- one of the things that's very interesting and fun about this particular customer who is a very notable customer, okay? When they gave us, and I don't think I'm [ overstating, ] when they gave us the vectors, the test vectors, et cetera, they were giving it off of a platform from package level, okay?

Package and wafer are different. We had a huge arm wrestle with them related to what they could actually do at wafer level and ultimately, we're able to demonstrate to them significant DFT, lower pin count modes, et cetera, to be able to do it at wafer level, which was a big deal because they never understood that because, of course, nobody has ever done this before with us, okay?

I'll just leave it at this. They actually gave us some things that were implied based upon package that didn't really weren't totally applicable to wafer level, and we struggled with some of that. And it turns out -- so it actually did delay a little bit. I think they -- it's mutually understood. It's like, "Oh, sorry, that we were thinking in package, we forget about wafer and sort." And that's a growing thing. We've seen this with other customers. On the very first time you're doing wafer level burn-in, you just don't think about it from the challenges or the differences at what happens when you're talking about a device that shares common substrates or from a probing environment.

So is it longer? Maybe a little bit, measured in weeks or a couple of months or something. But some of the things that like mechanically wafer physical contact to the device using our auto aligner to pack these new fine-pitch WaferPaks, the test plan itself, the vectors, those things were all going along pretty well. So I wish it was a little bit sooner, but I think we're still very much on track to try and get them some data over the next couple of months here or even maybe even this month.

So now the question, of course, parlays into what do they do with it? What's the timing? Do you understand what device they want to cut in? We do. We're not going to share that with you guys. are we going to make it? We believe we're still -- there's lots of reasons to actually want to cut in wafer-level burn-in and the sooner, the better. So I'm actually -- we're really excited about this particular one. And then now we've got another couple of guys that are saying, "Pick me, pick me too" and are generating the information to give us so that we can actually do design reviews and walk through a WaferPak design for them as well.

Got it. That's helpful. And I just want to address the potential of cannibalization between package and wafer level. And if I read through your comments, it seems like the AI processor is what's moving along with this customer on the wafer level. You had mentioned briefly actually on the ASIC side. Do you -- are you anticipating that the ASICs basically run with package level and that AI processors are wafer level? Or are you anticipating both at wafer level?

Yes. Okay. Okay. So vocabulary for everybody that's’ listening out there, right? So there -- when you talk about processors in the AI, arguably, there's even maybe at least 2 or 3 different broad flavors of them, okay? You're going to have the actual GPU, if it's an NVIDIA or ASIC when you talk about everybody else's. In reality, the GPU is kind of an ASIC at NVIDIA too. Jensen said that at one point. These are AI accelerator platforms, okay?

And then there -- and they can be used for large language models or for inference type things. There's also processors that like CPUs, like Intel or Grace or Vera-type CPUs and others that are making them that are also going through a burn-in process. And then there's -- you could argue there's even network processors and things like that. But generally, when we talk about AI processors, we're generally in the CPU and GPU type or ASIC type that are combined together in these AI processor clusters.

And things like you hear at GB200 is Grace CPU and 2 Blackwell AI accelerators in 1 package, if you will, or in 1 cluster. What's happening with the road map is that devices are going from a single AI accelerator or CPU on a -- in a package to a package that includes embedded memory, like high-bandwidth memory and high-bandwidth flash over time and then to having more than 1 compute chip in it. So having 2 processors in it or 4 or 8, like you look at the Intel or the AMD road map. Everyone has a road map to 2 or 4 more AI processors on a single substrate. What's happening is that there is a -- the qualification of those are all done today in a full package. The whole device in a big substrate is done, and it can take months to even go to get the packaging and qual that. So there are people that would like to be able to qual the processor inside when it's still in wafer form, right?

From a production perspective, the value proposition is you're burning in these devices and when they fail, you take out the other compute chip and all the memory plus the co-os substrate, which costs more than the silicon of the compute chip itself. So the road map is getting more intense. So there's people that are like, oh, I want to evaluate this for this device, this would make sense. But boy, the next one makes twice as much sense and the one next to that is 4x as much sense because of this evolution.

So a lot of trends we discussed, okay, is there a window. Like what happens if you just missed this one device, it doesn't feel like that it's a treadmill of you can always step on. And the customers are like, okay, how do I cut you in? I've said publicly that our large package part production customer, we've talked about it as an ASIC hyperscaler. They're actually on Sonoma production. We're qualifying their next device that's going to go to production, we believe and hope it will go on Sonoma as well. okay?

The third one that are giving us design files of so we can make sure that Sonoma is ready for that, but they've also said, you know what, by then maybe we want to consider FOX wafer-level burn-in. And an interesting thing is it's like, well, what will you do with all the package systems from us, who cares? It's like, what? Because if I could move it to wafer level, I don't need to do it a package anymore. Now will it cut over just like that, we'll see. I think the world is going to be both for a long time, and we're in a great position to do both.

But is there cannibalization? For sure. We had a customer come in who wanted to talk about what we thought was packaged part burn-in. Alberto, our VP over the packaged part business, and I met with them and 15 minutes into the meeting, he goes, I'd like to talk about wafer level. Alberto looked over at me and I'm like, okay, new slides. So at least we got both. And we're in a great position. And actually, I would say it's all 3, we do the high-temp operating life today only at package over time at wafer level, and we do production burn-in either package or wafer level. So a great front row seat.

Our next question comes from Max Michaelis with Lake Street Capital.

First one for me, just around the bookings guide. I know you previously shared that majority of around AI. But just given the distinction between the low end and the high end, if we just take the midpoint of around $70 million, I mean, what -- to get to that $80 million, is that all basically around AI? Or does that suggest any improvement around silicon carbide or GaN?

It's the least in that number is silicon carbide, okay? And then GaN is pretty close. Hard disk drive is a little bigger. Then silicon photonics is a chunk. I mean we've got production systems in there for our production -- our lead customer. We have a new customer that wants a system. They want a chip by May. We're suggesting to them that they really should get their order in before we ship it, joke, joke. I'm kidding, it's a challenge right now because they're like, please, please build it. we actually have a system on our floor. And if they get their PO in if you're listening, you get to get it, if not, we'll give it to the next guy, but anyhow. And then it would be wafer-level burn-in. And then I think package is the biggest. I'm sorry, wafer level burn-in AI and then packaged part AI is the biggest.

Okay. So -- and yes, that's just actually, the $60 million to $80 million, the $80 million suggests just greater volume orders from wafer level burn-in...

Okay. And then lastly, I haven't had time to run through the entire press release, but that $5.5 million order you noted in your prepared remarks. Can you go any -- can you share some more detail on that? Is there anything new that we should be looking for? Or is just kind of standard?

You know what, it has a mix of some customers that already had Sonomas that were buying more that were AI related. It had some burn-in modules. That was important because it was for a new design of a really expected to be high runner that's going to production. It has a big order from a what we call our a premier Silicon Valley test services company, we'll leave it to that.

They actually bought a number of the new Sonoma configurations, which are the very high power ones that allow them to go to 2,000 watts. We have some devices that we're going to be testing this spring that are almost 2,000 watts per device, right? And everybody is out there talking about how can you do -- what does it take to get to 1,000 watts, we're jumping right past that. And this is in a high-volume Sonoma system.

So they'll be able to test a large number of devices in that system. And I'm trying -- I think the numbers I should note this number. I think it's 44 devices. But I mean it's a large number of devices to be able to test those. And it's -- by the way, it's either 22 or 44. I should know that. Sorry, folks. Go through the math on that particular application because of the number of resources and power supplies and things. But it's the biggest part we've seen that's in development, and that's going to be going to production. So that's a big deal. So it's a combination of several different orders. Every one of them is kind of sort of strategic to us.

The next question comes from Larry Chlebina with Chlebina Capital.

We try to line up your ramp or at least your demand for the systems that you're working on developing for these customers on the AI processors with what's publicly disclosed in terms of the product launch. Is there a case where they may start up on packaged part wherever they have the capacity to do that. And then when they feel comfortable, maybe if it's after the products launched, would they cut over the wafer level burn-in because it's so much more efficient and saves them money? Would they do that? Or would they just do it initially on a brand-new product launch at the beginning? That's kind of -- do you have a sense of that?

Okay. So I wouldn't -- there's 2 things in there. What I definitely see happening is we know for a fact a customer was doing system level or rack test, okay? The only time they identified infant mortality or early life failures was when it's installed in the data center pretty nasty okay? That's test or not or burn-in. So they said, we'll run it for 2 weeks, and it hasn't died we'll accept it kind of thing, and then they'll actually plug it into the network, pretty expensive way of doing it.

Then there are companies like AEM and Advantest and Teradyne that have talked about system-level test machines, which is a type of ATE machine, that is designed to be doing a high-speed insertion and boot up like the operating system. It's a great way to do a very high degree of test coverage for a specific application.

People were saying, oh, we're going to do burn-in with that. Well, that doesn't really -- those systems are designed for high speed. They're designed to be at the user mode. They're designed to run cold. They're not really designed for burn-in, and they're quite expensive and large.

But the market was pulling on that because it's sure better than doing it in a rack. And there wasn't another system available in what a lot of people refer to us as ovens, which is a large-scale system that you put lots of burn-in modules or trays with lots of devices and test all at once. Those were like from KYC or maybe 600 watts and below or something. And there really wasn't a tool out there for that.

This is where Sonoma was pulled up because we were doing -- Incal was using it for the Hi-Tec operating life, but it's like, well, wait a minute, can I use that in production? Can you add automation? Can you do these things support? And can you quadruple or 50x your capacity?

So that's where Sonoma is coming in. When Sonoma enters that market doing system-level test or rack test makes no sense whatsoever. So it's highly competitive as that. Now having said that, wafer-level burn-in is even better. But a lot of people may say, well, I need to think through that. Where do I put that insertion, I might need to implement some design for test modes to be able to implement it at least to take advantage of the very low cost full wafer contactors from Aehr Test and things like that.

So I think it's an evolution. But I think the conversation we have with customers is they're like, I need package for burn-in, let's talk about that. But boy, wafer-level burn-in would be better, how do we engage on that? And then specifically on a per customer basis, I don't want to get too carried with our strategy. But if you have an installed base of something, a packaged part burn-in systems or I could go in and displace you with maybe Sonoma but it's probably better for me to go displace you with wafer level burn-in because it's not even a price thing in that sense. It's yield. It's so -- or capacity.

So we -- it depends on the customer, and we have some customers that have some devices that want to think about wafer level, something they want to think about package, something they want to think about package and then eventually the wafer level over time. I hope that was -- as I look back, that was pretty confusing. But there's -- it's an evolution of it. And guess what we do, the customer is always right. You tell me what you want and we're in.

Well, if the -- if you -- all these evaluations, they have going on with wafer level burn-in, if it takes longer and the product ends up getting launched, would they still cut over to some portion of the production on wafer level burn-in once it's proven out for the particular product or the predictor -- would they do that midstream?

I think it depends -- I don't -- it's not a slam dunk. I mean, I think traditionally, people will start a product and do the release of that one product on one test platform or something. And then you cut in on the next one. I think that'd be fair to say, but there are certain devices we know that their intended application, there's 2 or 3 different applications for it. So for a large language model, maybe they think about it one way, but if it's going to be automotive, then that's a different thing, right?

So even within a product, there might be an evolution or they get by until they can implement wafer level burn-in. That particularly comes in the fact when you think about a multichip module, right? As soon as you could do wafer-level burn-in, if I could save you 1% yield per die on a 4-die AI processor that has a $15,000 BOM. Of course, you would do that, right?

I'm not sure if they would.

Yes. So we're trying to be as open as we can. We know as much as we know, but there's definitely advantages to do wafer level. I mean ultimately, that's the most -- kind of the best place you could ever do it. And if you implement some DFT and some of the things we do, I can build you a WaferPak in 8 weeks. Have you on wafer.

I'll shift gears on the flash benchmark that you completed right a little bit ago before holidays. When do you expect the customer to get back to you and more importantly, when do you expect them to come with an order.

I was waiting for somebody. Yes, that's where my head's at, too. My guess is, Larry, in the next couple of months or so for them really to get back, depending on how they -- the wafer is going back to test, which is tested at wafer. I don't think they're going to package it up and go through some stress qualification, that might be something. But we've already had some design reviews with them on our new tester and planted the seeds, they were very impressed is how I would describe it. The big trend -- the big shift here was when we even started this thinking to do the benchmark with them, which is what like a year ago, if I get that right.

Yes, over 1.5 years ago.

Yes. Yes. Fair enough, right? When we were starting to even build up to get the design files and what wafer we are going to be testing with them, it was not aimed at high bandwidth flash because that didn't even exist, right? They were looking at it for like commodity data center SSDs. Now with the HBF, it broke their infrastructure, the power supplies, IO pins, et cetera, and parallelism, and now they have a power problem, which we love. Well, we're good at power. So people that have power problems that's music to our ears, so yes.

I recall you originally said the driver, their motivation was as the 3D NANDs got higher levels of -- they're even talking about getting the 400 level.

Layers, layers, yes.

Layers, that required more power and exceed the power in their existing systems so that they need your high power. So here we are 1.5 years later. And so how are they getting by to this point? And don't they need your high-power capability?

They're doing -- they're having to -- they can't test a whole wafer in one touch down as an example. But that -- what I described there, which people -- if you follow along with that, that was actually referred to as hybrid bonded flash same letters by the way, right? Hybrid bonded flash was a novel idea that the base substrate layer was logic done on the logic process and then you build up just the stacked memory, and you do that in a memory process and then you bond them together.

The result of it is that memory stack is a taller building with a smaller footprint, so you get more die per wafer. That's good, right? But the power was much higher, HBF as in high-bandwidth flash is, in some ways, architecturally similar, except for its more power because of its speed it has additional power supplies, and it's taller, it actually is even more of a problem for them, which I guess, if you're a tester guy, the bigger the problem, you have more to solve. But we had to go back and redesign the tester because we were originally aiming it at the other device.

I would think they would need more capacity for the enterprise flash part of it before they ever start needing something for HBF. So the enterprise flash, I'm wondering when is something going to happen there? It seems like it's overdue.

Yes. I mean our goal, in this case, would be -- we had originally hoped to finish the benchmark at the end of last year, okay? So like we're 6 months later. And I think as shared with you, if you read through all of the notes, around March, it was like it felt like you're pushing a rope, something was going on. If you knew who the company was it'd be the very obvious what was going on, okay?

But that what really happened is they kind of shifted from enterprise focus to HBF. And so that slowed some things down in terms of even reviewing our tester. And then they came back to us in the summer and we're like, okay, here's the new tester we'd like. So okay, maybe that's good. It's for people that you're tapping your fingers, it's taking a long time, but that's part of what happened there. But at this point, again, we walked up there actually -- they thought we were just going to take their wafer and stick it into one of like our NPs with a manual setup and we showed them a fully integrated machine. So they walked up and we put their wafer at a FOP, put the FOP onto the Sierra automated WaferPak Aligner, ran the wafer. It opened up the blade, stick the wafer -- put the wafer in the WaferPaks, put the WaferPaks in the blade, close the blade, ran the tests, gave them the results. It's pretty impressive.

So you're ready to go for production. So it seems like they need. They're going to need more capacity based on everything that's going on in the memory market.

Exactly. And right now, they're all flushed with margins. How is that, right? So I agree, you know what, we've been, Larry, you as people that follow Larry is our greatest cheer leader, along with me in memory strategy for us. We are spending money, okay? It is part of -- as Chris alludes to, we could be doing better, well, at these revenue levels, this is -- we're not happy with these revenue levels, right? We're not making money at these levels. But we would be making more money. We're spending money. We got our foot on the gas. And in fact, it's our expectation that we'll increase the R&D spend particularly in the AI wafer-level burn-in, a little bit in the package because we spent a lot of money on that in just this last year for package getting this new product out and then the memory system which will be a blade in our FOX system basically.

It should be -- it should pay off. Let's -- so hopefully soon, sooner rather later.

I vote yes, too. As a shareholder, I think it's good money to be spent.

That's all I have. Thank, Gayn.

Thank you, Larry.

[Operator Instructions]. Okay. I'm showing no further questions in the queue. I would like to turn the call back to management for closing remarks.

Thank you, operator, and thank you, everybody. We really appreciate you guys taking the time to spend an hour with us. I think about that exactly again. And we'll keep you guys updated. Stay tuned. We're really excited about this and hope that the orders will come in shortly enough to be able to make this less dramatic as we go forward and set us up for a really strong year heading into next year. So I appreciate it.

If you are in town, we are in Fremont, California, Silicon Valley, give us call, set something up, come by take a look at the facility. If you haven't seen our tools, they're very impressive and get a feel of the capacity because we have a lot of systems on the manufacturing line right now. So take care, and Happy New Year to everyone.

This concludes today's conference, and you may disconnect your lines at this time. Thank you for your participation.

Greetings. Welcome to the Aehr Test Systems Fiscal 2026 First Quarter Financial Results Conference Call. [Operator Instructions] Please note, this conference is being recorded. I will now turn the conference over to your host, Jim Byers of PondelWilkinson Investor Relations. You may begin.

Thank you, operator. Good afternoon, and welcome to Aehr Test Systems First Quarter Fiscal 2026 Financial Results Conference Call. With me on today's call are Aehr Test Systems' President and Chief Executive Officer, Gayn Erickson; and Chief Financial Officer, Chris Siu.

Before I turn the call over to Gayn and Chris, I'd like to cover a few quick items. This afternoon, right after market close, Aehr Test issued a press release announcing its first quarter fiscal 2026 results. That release is available on the company's website at aehr.com. This call is being broadcast live over the Internet for all interested parties, and the webcast will be archived on the Investor Relations page of Aehr Test's website.

I'd like to remind everyone that on today's call, management will be making forward-looking statements that are based on current information and estimates and are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements. These factors are discussed in the company's most recent periodic and current reports filed with the SEC and are only valid as of this date, and Aehr Test Systems undertakes no obligation to update the forward-looking statements.

And now with that said, I'd like to turn the conference call over to Gayn Erickson, President and CEO.

Thanks, Jim. Good afternoon, everyone, and welcome to our first quarter fiscal 2026 earnings conference call. I'll begin with an update on the exciting markets Aehr is targeting for semiconductor test and burn-in with an emphasis on how these markets seem to share a common thread of market growth related to the massive expansion of data center infrastructure and AI. After that, Chris will provide a detailed review of our financial performance. And finally, we'll open up the floor for your questions.

Although we started with the typical low first quarter revenue, consistent with the last few years and actually higher on both top and bottom lines in Wall Street analyst consensus, we're pleased with our start to this fiscal year. We had revenue from several market segments and strong momentum in sales and customer engagement in both wafer level and packaged part test and burn-in of artificial intelligence or AI processors. Again, although we did not provide guidance for the quarter, our first quarter results surpassed analyst consensus estimates for both the top and bottom lines.

We saw continued momentum in the qualification and production burn-in of packaged parts for AI processors, which is fueling sales growth in our new Sonoma ultra-high-power package part burn-in systems and consumables. During the quarter, our lead production customer, a leading hyperscaler placed multiple follow-on volume production orders for Sonoma systems, requesting shorter lead times to support higher-than-expected volumes as they accelerate the development of their own advanced AI processors. This customer is one of the premier large-scale data center providers and has already outlined plans to expand capacity for this device and introduce new AI processors over the coming year to be tested and burned in on our Sonoma platform at one of the world's leading test houses.

We're also collaborating with them on future generations of processors to ensure we can meet their long-term production needs for both package and even wafer level burn-in. Hyperscalers like Microsoft, Amazon, Google and Meta are increasingly designing and deploying their own application-specific integrated circuits or ASICs for AI processing to meet the unique demands of their massive scale workloads and gain a competitive advantage.

Aehr allows customers to perform production burn-in screening, qualification and reliability testing for GPUs, AI processors, CPUs and network processors directly in package form. Our Sonoma systems provide what we believe to be the industry's most cost-effective solution, enabling customers to smoothly move from early reliability testing to full production burn-in and early life failure screening, which helps reduce costs, improve quality and speed up time to market.

In the last year, Aehr has implemented several enhancements to the Sonoma system to meet qualification and production test and burn-in requirements across a wide range of AI processor suppliers, test labs and outsourced assembly and test houses or OSATs. Major upgrades include increasing power per device to 2,000 watts, boosting parallelism and adding full automation with a new fully integrated packaged device handler.

Over the last quarter, including a very successful customer open house we held last week at our Fremont, California headquarters, 10 different companies visited Aehr to see our next-generation Sonoma system and new features, including a fully automated device handler for completely hands-free operation, which we've installed here at our Fremont facility. Customer feedback regarding these enhancements has been very positive, and we expect these new features to open up new applications and generate additional orders this fiscal year.

As I've mentioned before, one of the biggest benefits of our acquisition of Incal Technology 1 year ago is that it gives us a front row seat to the future needs of many top AI processor customers, providing us with close insight into their burn-in requirements. As the only company worldwide that offers both proven wafer-level and packaged part burn-in systems for qualification and production burn-in of AI processors, Aehr is ideally positioned to assist them regardless of their burn-in method. Consequently, we are experiencing increased interest in our Sonoma high-volume production solution for package level burn-in and some of these same customers as well as other AI processor companies are approaching us to learn about our production wafer level burn-in capabilities.

This past year, we delivered the world's first production wafer level burn-in systems for AI processors. Importantly, these systems are installed at one of the largest OSATs worldwide, providing a highly visible showcase to other potential AI customers of our proven solution for high-volume testing and burn-in of AI processors in wafer form, thereby strengthening our market position. We anticipate follow-on orders from this innovative AI customer as volumes increase and other AI processor suppliers have already approached us about the feasibility of wafer-level burn-in of their devices.

We're also developing a strategic partnership with this world-leading OSAT to provide advanced wafer-level test and burn-in solutions for high-performance computing and AI processors. This joint solution already in operation at the facility marks a significant milestone for the industry. By combining Aehr's technological leadership with this OSAT's global reach, we can provide unique capabilities to the market. This model offers a complete turnkey solution from design to high-volume production and several customers have already begun discussions to learn more about our high-volume wafer-level test and burn-in solutions for AI processors.

This OSAT and Aehr have a long history of innovation together, including the first FOX-NP wafer-level burn-in system installed in the OSAT for high-power silicon photonics wafers, now the world's first wafer level test and burn-in of HPC AI products using Aehr's FOX-XP systems. And they're also one of the largest installed bases of Aehr's Sonoma system for high-power AI and high-performance computing processors.

Additionally, this last quarter, we launched an evaluation program with a top-tier AI processor supplier for production wafer level test and burn-in for one of their high-volume processors. This paid evaluation, which includes a custom high-power WaferPak and the development of a production wafer-level burn-in test program will feature a comprehensive characterization and correlation plan to validate Aehr's FOX-XP production systems for wafer-level burn-in and functional testing of one of the suppliers' high-performance, high-power processors on 300-millimeter wafers. We believe this represents a significant step toward adopting wafer-level burn-in as an alternative to later-stage burn-in and into future generations of their products. Our FOX-XP multi-wafer test and burn-in system is the only production-proven solution for full wafer-level test and burn-in of high-power devices such as AI processors, silicon carbide and gallium nitride power semiconductors and silicon photonics integrated circuits.

Beyond AI processors, we're seeing signs of increasing demand in other segments we serve, including silicon photonics, hard disk drives, gallium nitride and silicon carbide semiconductors. We're experiencing ongoing growth in the silicon photonics market, driven by the adoption of optical chip-to-chip communication and optical network switching. This quarter, we upgraded another one of our major silicon photonics customers, FOX-XPs to the new higher power configuration, doubling their device test parallelism with up to 3.5 kilowatts of power per wafer in a 9-wafer configuration. This latest system shipment includes our fully integrated and automated WaferPak Aligner configured for single touchdown test and burn-in of all devices on their 300-millimeter wafers. We anticipate additional orders and shipments this fiscal year to support their production capacity needs for their optical I/O silicon photonics integrated circuits.

In hard disk drives, AI-driven applications are generating unprecedented amounts of data, creating ever-increasing demand for data storage and driving new read/write technologies for higher density drives, particularly for data center applications. We are ramping and have shipped multiple FOX-CP wafer-level test and burn-in systems integrated with the high-power wafer prober and unique WaferPak high-power contactors to a world-leading supplier of hard disk drives to meet the test, burn-in and stabilization needs of a new device used in their next-generation read/write heads. This customer is one of the top suppliers of hard disk drives worldwide and has indicated they're planning additional purchases in the near term as this product line grows.

Gallium nitride devices are increasingly used for data center power efficiency, solar energy, automotive systems and electrical infrastructure. Gallium nitride offers a much broader application range than silicon carbide and is set for significant growth in the next decade. Our lead production customer is a leading automotive semiconductor supplier and a key player in the GaN power semiconductor market, and we have multiple new engagements with other potential GaN customers in progress. We're currently in design and development of a large number of WaferPaks for new device designs targeted for high-volume manufacturing on our FOX-XP systems.

Although silicon carbide growth is expected to be weighted toward the second half of the year, we continue to see opportunities for upgrades, WaferPaks and capacity expansion as that market recovers. Demand for silicon carbide remains heavily driven by battery electric vehicles, but silicon carbide devices are also gaining traction in other markets, including power infrastructure, solar and various industrial applications.

Late in last fiscal year, we shipped our first 18-wafer high-voltage FOX-XP system, extending beyond our previous 9-wafer capability to test and burn-in 100% of the EV inverter devices on 6- or 8-inch wafers in a single pass with up to plus or minus 2,000-volt test and stress conditions at high temperature. We believe we're well positioned in this market with a large customer base and industry-leading solutions for wafer level burn-in.

I also want to give a quick update on the flash memory wafer level burn-in benchmark we've discussed earlier. This benchmark is ongoing, and we've now begun testing with our new fine pitch WaferPak that can meet the finer pitches and higher pin count costs more cost effectively for flash memory, but also can be applicable for DRAM and even AI processors if they require fine pitch wafer probing. This is the first WaferPak full wafer contactor demonstrating this capability.

The benchmark has gone slower than expected with some challenges with the test system bring up, but appears to show positive results of the new WaferPak, our ability to do an 18-wafer test cell and using our full automated wafer handler and WaferPak Aligner for their 300-millimeter NAND flash wafers. Interestingly, the market for NAND flash is in a state of flux with earlier announced transition to hybrid bonding technologies for higher density NAND flash on 300-millimeter wafers, driving new requirements for higher parallelism and higher power to now a push for high-bandwidth flash or HBF, which drives very different requirements in terms of test system capabilities. This is exciting news for Aehr as both are driving power requirements up substantially, which is right in our wheelhouse.

High-bandwidth flash or HBF, is an emerging technology developed by 2 of the flash market leaders and aims to provide a massive capacity memory tier for AI workloads by combining the DRAM high-bandwidth memory or HBM-like packaging with 3D NAND flash. This innovation is set to offer 8 to 16x the capacity of HBM DRAM at a similar cost, delivering comparable bandwidth to dramatically accelerate AI inference and process larger models more efficiency while using less power than traditional DRAM.

We're working with one of these lead customers on the now newer tester requirements to provide them with a proposal to meet even these newer, higher performance and higher power requirements within our FOX-XP wafer -- 18-wafer test and burn-in system infrastructure. We expect to have yet another update out at next quarter's earnings call.

The rapid advancement of generative artificial intelligence and the accelerating electrification of transportation and global infrastructure represent 2 of the most significant macro trends impacting the semiconductor industry today. These transformative forces are driving enormous growth in semiconductor demand while fundamentally increasing the performance, reliability, safety and security requirements of these devices across computing and data infrastructure, telecommunications networks, hard disk drive and solid-state storage solutions, electric vehicles, charging systems and renewable energy generation.

As these applications operate at ever higher power levels and in increasingly mission-critical environments, the need for comprehensive test and burn-in has become more essential than ever. Semiconductor manufacturers are turning to advanced wafer level and package level burn-in systems to screen for early life failures, validate long-term reliability and ensure consistent performance under extreme electrical and thermal stress. This growing emphasis on reliability testing reflects a fundamental shift in the industry from simply achieving functionality to guaranteeing dependable operation throughout a product's lifetime, a requirement that continues to expand alongside the scale and complexity of next-generation semiconductor devices.

To conclude, we're excited about the year ahead and believe nearly all of our served markets will see order growth in the fiscal year with silicon carbide growth expected to strengthen further into fiscal 2027. Although we remain cautious due to ongoing tariff-related uncertainty and are not yet reinstating formal guidance, we're confident in the broad-based growth opportunities ahead across AI and our other markets.

With that, let me turn it over to Chris, and then we'll open up the lines for questions.

Thank you, Gayn, and good afternoon, everyone. Looking at our Q1 performance, results exceeded analyst expectations for both revenue and profit. First quarter revenue was $11 million, a $16 million (sic) [ $2.1 million ] decrease from $13.1 million in the same period last year. It is important to note that last year Q1 benefited from a very strong consumables revenue quarter, which makes direct comparisons challenging. This quarter's revenue was primarily driven by demand for our FOX-CP and XP products.

In Q1, we shipped multiple FOX-CP single wafer production test and burn-in systems, featuring an integrated high-power wafer prober for new high-volume application involving burn-in and stabilization of new devices for our lead customer in the hard disk drive industry. Contactor revenues, which include WaferPaks for wafer-level burn-in business and BIMs and BIPs for our packaged part burn-in business totaled $2.6 million and made up 24% of our total revenue in the first quarter, significantly lower than $12.1 million or 92% of the previous year's first quarter revenue.

As we have discussed in the past, this consumable business is ongoing even when customers are not purchasing capital equipment for expansion. We feel that this revenue will continue to grow both in terms of absolute value, but also as a percentage of our overall revenue over time.

Non-GAAP gross margin for the first quarter was 37.5%, down from the 54.7% year-over-year. The decline in non-GAAP gross margin was mainly due to lower sales volume and a less favorable product mix compared to the previous year, which included a higher volume of higher-margin WaferPaks. Also, our products shipped this quarter included lower-margin probers and an automated aligner, both manufactured by third parties and sold as part of our overall product offerings. Non-GAAP operating expenses in the first quarter were $5.9 million, an 8% increase from $5.5 million in Q1 last year. Operating expenses increased due to higher research and development expenses for our ongoing project as we continue to [Technical Difficulty] and the memory project.

As we previously announced, we successfully closed the Incal facility on May 30, 2025, and completed the consolidation of personnel and manufacturing into Fremont facility at the end of fiscal 2025. In connection with the facility consolidation, we eliminated a small number of headcount due to redundancy in our global supply chain and incurred a onetime restructuring charge of $219,000 in our fiscal first quarter.

In the first fiscal quarter of 2026, we received $1.3 million of employee retention credit [Technical Difficulty] for eligible businesses affected by the COVID-19 pandemic. We record this cash credit minus the professional fee to process the refund and other income on our income statement. In Q1, we recorded an income tax benefit of $0.8 million and our effective tax rate was 26.5%.

Non-GAAP net income for the first quarter, which excludes the impact of stock-based [Technical Difficulty] was $0.2 million or $0.01 per diluted share compared to $2.2 million or $0.07 per diluted share in the first quarter of fiscal 2025. [Technical Difficulty] net income for the first quarter of fiscal 2026 [Technical Difficulty]. Our backlog at the end of [ the quarter ] was $15.5 million with $2 million in bookings in the first 5 weeks of the second quarter of fiscal 2026, [Technical Difficulty] $17.5 million.

Turning to our cash flows and balance sheet. During the first quarter, we used $0.3 million in operating cash flows. We ended the quarter with $24.7 million in cash, cash equivalents and restricted cash compared to $26.5 million at the end of Q4, mainly due to a final $1.4 million payment for facility renovation. In total, we have spent $6.3 million on remodeling our manufacturing facility.

With the renovation now complete, we have significantly upgraded our manufacturing floor, customer and application test labs and clean room space for WaferPak full wafer contactors. Improvements also increased our power and water cooling capacity, enabling us to manufacture all of our FOX wafer level burn-in products and packaged part burn-in products, including Sonoma, Tahoe and macro products on the [ same floor ]. We are very excited about this renovation as it was specifically designed to enable us to manufacture more high-power systems for AI configuration. We believe investment in this facility renovation has increased our overall manufacturing capacity by at least 5x, depending on the product configuration, and we are more ready than ever to support the growth of our customers.

We celebrated the upgrades with the customer open house that was well attended and received very positively. Over the past quarter, we hosted many packaged part burn-in level customers who have the opportunity to see our expanded capabilities firsthand. Importantly, we do not expect and anticipate additional capital expenditures for facility expansion in the near future. We have no debt and continue to invest our excess cash in money market funds.

As Gayn mentioned, we started the year by withholding formal guidance due to ongoing tariff-related uncertainty. Since we remain cautious, we will continue with that approach for now. However, looking ahead, we're confident in the broad-based growth opportunities across AI and our other markets.

Lastly, looking at Investor Relations calendar. Aehr Test will meet with investors at the 17th Annual CEO Summit in Phoenix tomorrow, Tuesday, October 7. The following month, we'll participate Craig-Hallum 16th Annual Alpha Conference in New York on Tuesday, November 18. And on Tuesday, December 16, we will return to New York City to attend the NYC CEO Summit. We hope to see some of you at these conferences.

This concludes our prepared remarks. We're now ready to take your questions. Operator, please go ahead.

[Operator Instructions] [Technical Difficulty] Christian Schwab, your line is live.

Great. That sounds like a much better connection. So Gayn, as we kind of get into the second half of the year and kind of these more open-ended growth opportunities in AI that you've talked about in particular, when do you think we'll see a material improvement in bookings to drive revenue down the road?

Well, that sounds an awful lot like guidance again here. But -- so what we believe and what we've tried to communicate in our previous calls as well is that our lead -- our first AI wafer level burn-in production customer, we anticipate that they will need additional capacity that would be both bookings and revenue for this year. And that could be more than last year, and we won't put a top on that. So the question is timing of that. We're not sitting on an order. We didn't get it yet and just put it in our pocket. But as that order comes in, we typically will announce those within a couple of business days or so. What we are seeing is additional wafer level customer engagements. It's pretty interesting that kind of span from processors and AI -- I'm sorry.

Okay. Hold on, that was -- Christian, can you hear me okay?

I can hear you, Gayn.

Okay. All right. So I'll assume that Christian is on mute or something that he can hear me as well. So we're seeing it across several different groups from hyperscalers, AI processors kind of across the board. And it's interesting. We have direct people that have come in saying that's what they're interested in. We have people that are talking to us about Sonoma for their -- because their current customers already doing qualifications and are looking to do burn-in for the first time and are looking to their package and also now exploring the wafer level side of things.

So these generally do take some time. And so I would probably guess these tend to be more second half, this being the second fiscal quarter of fiscal '26 for us. But at this point, we're just scrambling as fast as we can to address all the requests and requirements and keeping our head down to focus on them.

On the package part, same thing, both additional quals and additional processes that are being put on our system and its enhancements to the Sonoma as well as we've got customer interest to do additional production customers with and without the fully automated integration of the pick-and-place handler that bolts right onto the front of Sonoma. So I think it's ongoing and very interesting, and we're just really happy to have this number of engaged and active customers.

Operator, can you hear us?

Yes, I can hear you. And are you ready for the next question?

Yes. Christian, do you have any other questions or -- seems a little abrupt this time.

We have a question coming from Christian Schwab.

Sorry about that, Gayn. I was telling you I could hear you, but it wasn't working. So we have a few customers here currently. You talked about a bunch of more customers coming in there. As we look to the end of your fiscal year, do you have a target number of customers that you think you'll be in the process of shipping to by then or shipping to fairly shortly afterwards?

That's a good question in terms of targets. Actually, we do have some discrete quantity targets. In fact, some of the KBOs, which are the bonus structures for our officers are based upon not only numbers but specific targeted AI customers. Really given a lot of insight, but I would say in plural for additional package part and also for wafer level. So at this point, we're not really limiting ourselves, but we're just trying to be cautious about oversetting expectations either in terms of the timeline of it.

But it's actually -- one of the things that was interesting that really came to fruition, and I apologize if I said this before on the last call, is I'm starting to also understand a couple of things going on. One of them that was kind of new is there are -- many of the ASIC suppliers in particular, and there's some evidence within the GPU or just the processor suppliers themselves, they don't do a production burn-in like you think about it like using one of our tools. They're doing it at system level, like as in the rack. So these processors are getting all the way to the end, and then they're simply running them in rack form, sometimes at elevated temperatures and sometimes not to try and get the first 7 days of failures out of them, which is so inefficient and uses a ton of power.

And there's only so many processors per rack, if you will. And so I was sort of surprised at some of this. Some of the test vectors that we're getting from customers are not -- this is on a production tool today. This is just an HTOL, which is like a qualification vector instead of a production vector, and that's because they weren't doing production yet. So you're really at the leading edge of this. But one thing is really clear from the data we've seen so far, the devices are failing. We do see the failures in the burn-in. So they're absolutely able to screen them using our tools at wafer and production. And so that creates the leading edge of this market and why we're so excited about it.

I mean it's really -- I mean, obviously, every single call you get on, your CEOs are talking about, how they're using AI one way or the other. But this is really happening to us. I mean it was 40% of our business last year from 0. We think it's going to grow both package and wafer level this year. And we're still seeing the other businesses grow as well. So we're really glad to have gotten the facility upgrade behind us. There's a lot of work to get that there. Now we have the capacity to be able to ship so many more systems, particularly the high-power ones. And if you come on our floor right now, you'll see AI wafer-level burn-in systems right next to Sonoma systems being built today. So I think that we believe that we have the opportunity to capture multiple customers in both package and wafer level.

And then my last question, Gayn is, last call, you were quite enthusiastic about the TAM for AI-driven products for you to be 3 to 5x bigger than silicon carbide. And is there a time frame that we should be thinking about that, that becomes evident? Again, I kind of asked it on the backlog question, but I'll ask it again more directly. Are we going to see material orders from 1 or 2 customers this fiscal year? Or is that something that is just too early to know, but yet you feel confident it's going to come. How should we be thinking about that?

I feel the latter is the easy out to say that I'm confident they'll come. I think timing it can both be a lot more guidance than we're providing right now. But there's also just some of these evaluations as we prove it, the customers can actually start contemplating how many and when they would want to install them. The new evaluation, I think we already alluded to it, it's for a processor that is expected to go into volume production at the end of next year or in the second half of next year. So tools would be needed to be going in, in that time line.

So if you just -- we do fiscal years through, in this case, fiscal '26 is through May of '26. If you talk about calendar '26, there's a lot of opportunities in play that need to play out that would be production for both wafer level as well as package. So it's not that far away. I mean, even something that seems like is 1 year away in our space, there's a lot of work that needs to be done to actually ramp a customer to be 1 year out. And so we'll keep focused on this thing as we get a little closer, we'd hope to give you answers.

To be candid, this will probably feel like you'll hear enthusiasm and we think we're winning and the customer has gotten good results. Those will be early indicators. And then we're going to surprise everyone with a large production order, not unlike what happened with the first wafer level system, except for some of these customers are just significantly bigger.

Your next question is coming from Jed Dorsheimer.

You have Mark Shooter on for Jed Dorsheimer. Congrats on the success this quarter and the announcements for the AI customers, and that's great. Can you give us a little color on how should we think about the engagement in the qualification cycle for these customers? Do you need a new product cycle to occur? Like do you need to slide in between Blackwell and Ruben? And if you can give us a little bit of what's it like in the room with the customers? Is the tenor of these guys risk aversion? Or is the overwhelming demand spur some willingness to try a new equipment like Aehr?

That's actually, there's a lot in no doubt. Those are good ones. All right. So let me talk about sort of the qualification process. So far, in the engagements that we've had so far, we don't need a new product, okay? So we are doing some things depending on their pitch of their probe cards, which we call our WaferPaks, we may need to do some things specifically for that. We have some design for testability features that we have been touting to our customer base that allow them very short lead time, high-volume, low-cost WaferPaks. We can also supply them at higher cost and a little bit longer lead time if they don't hit those DFT targets. We've got some of both.

And so like one of the engagements, we made a conversation related to them about their pitch of their devices. And we're like, wow, you happen to choose a pitch on these so many pins, that's driving the cost of your WaferPak up. And they're like, well, why didn't you tell me before and they kind of joke because they hadn't talked to us before. And they're like, well, this will be no problem to cut in for our next generation, but we're just going to have to live with it on the current one. So they're engaged with us in kind of a roll up the sleeves working.

The qualification in some cases, is just validating that we can do the same type of DFT and power delivery as we've done with the other processors on their devices. I think customers, I get it. They're kind of like, it's hard to imagine that we can really pull this off if they haven't seen it with their own eyes. And so we're just showing it and demonstrating it to them somewhat like what we ended up doing with the first silicon carbide customers. And then at some point, people get it.

Now one thing that also seems to be going on is these are pretty visible. I already said that these systems are sitting on an OSAT. And there aren't that many of them, okay? So especially not that many of the biggest, right? There's a lot of people out there that are aware of the success of this. And even though the analysts are still trying to figure out everything, there's a lot of people that are pretty intimate knowledge and seem to know what's happening. And so they're like, can you do -- can I do it that way, too. So they're leaning in. So it's a little less of complete disbelief, can you do it, but more of can you prove it for me.

Now from a timing perspective, it's just typical the industry, normally, you -- when people are buying test equipment, like semiconductor test equipment like ours, you do it at some disconnect, either you're putting a new fab in if you're an IBM or it's with some new product or it just simply the volume is growing so fast that you want to buy a tool that has more output per dollar or so. So in this case, outside of one supplier, everybody is using TSMC today and eventually, Tesla will be using the Samsung stuff. But it's not like there's a new fab, although there are new fabs coming online.

People are just giving access to those TSMC wafers and then want to be able to test them and they either do it in a package for burn-in on something like Sonoma or system-level test or off -- all the way back at the rack. So customers are engaging because they need to buy capacity for these new products and for new things coming out. So it is a fairer way of looking at it to look at the intercept between product A to product B. That's at least what's been communicated to us with this latest one we just announced, okay?

And similarly, our first customer intercepted us with their new -- their transition to a newer device. We announced that a year ago. So that's pretty typical. And sometimes that's the gating item of their timing. And sometimes that's fast or slow, but it's sort of you need to time it with that.

Just the tenor or the tone, so if you guys -- people that have followed us understand that our value proposition and our pitch, if you will, is that semiconductors are growing extremely high. So within -- it took 40 years to get to $500 billion, it's going to take less than $10 billion to double that, okay? Much of that is driven by either directly AI or all of the pieces surrounding all of the explosive data center growth, okay? What's happening is people -- these devices are not more reliable for multiple reasons. The smaller and smaller geometries and the fact that they're putting multiple devices into one package because they can't make the devices any bigger are driving the requirements for reliability and burn-in test.

And if you look at the road maps from all of the players, every single one of them from all of the NVIDIA products to everyone else, from the ASIC suppliers, all their products going forward are pulling multiple compute processors to make it generic in a single package, along with many, many stacks of HBM and ultimately optical I/O chipsets. They put these on these complex advanced packaging substrates, and they're extremely expensive. And I always remind people, the reason you burn them in is because they fail. And when they fail, you take out all the other devices. So the value proposition, if someone could ever do wafer-level burn-in is overwhelming because the cost of the wafer level burn-in is cheaper than the yield loss.

I actually alluded to it in my prepared remarks that our lead customer for packaged part burn-in is going to do a couple of few generations in packaged part and then wants to switch to wafer level. So what are they going to do with all those Sonomas? It doesn't matter. The yield advantage of moving it to wafer level pays for it all. So that's a thing -- that's a macro trend heading our way. And it's not just AI. It happened to us in the silicon carbide side of things. We see it in stacked memories in both DRAM and flash. We see it in other complex devices in GaN that are going to automotive that are mixing different devices together and why it's driving for wafer level. And these large trends are good for both reliability as a tide that's rising for all and really good for us, but also for our unique products with particularly the Sonoma and the high-power wafer-level burn-in systems we have with our FOX products.

Gayn, all that color is very helpful. To dig in a bit around that last part of the Sonoma versus the FOX products, what are the -- what's the gating factor of why customers are going first with the Sonoma and not right to wafer level burning? What needs to be proven out for wafer level burn-in for those customers? And how -- I'm assuming there's a sales cycle there of you'd like to start with Sonoma and then push people to wafer-level burn-in. So how does that transition [ builds ]?

Yes. The way we look at it is we say we're just neutral. If you want to do package part or you want to do wafer level, we love you both, okay? It's not easy to just go talk someone out of whatever it is they're used to. So in this case, we don't have to. We just say, listen, we think we make the best machine for qualification reliability of your complex packages with Sonoma. They can test all the processors, HBM and all the chipsets inside of it in a single pass during your calls. If you want, we'll do it in production as well. And we're now adding automation to it.

But if you'd like to kind of go to the next step, you could do -- take the high failing devices out of there and do a wafer-level burn-in of them before you put them in those packages. And our data would suggest you don't need to burn them in again. But if you still need a little burn-in, that may be fine, but you don't want to have the massive yield loss. Some of these processors have 4 and 8 CPU chips in them, right, compute chips and have another 6 or 8 HBM stacks on it. Just the CoWoS substrate is extremely expensive and rare. And so it makes sense to go to wafer level. But to be candid, 1 year ago, 12 months ago, we didn't even have the first order. There was not one machine in the world that could do a wafer level burn-in of an AI processor, okay? None. We're the only ones, and we now have just shipped our first systems and we're at the front end of this thing. I understand people are sort of in a doubting mode. Let us prove it to them.

And for those that are on the call, if you have a processor, we can -- you can sit down with us on our nondisclosure, we can tell you which exact specific files we need, and we can do a paper benchmark and give you an answer within a couple of days as to the feasibility of your devices. And so far, we have not found one that we haven't been able to test that we've been given that detailed data on. So I'm sure there are some out there. But for now, we're on a roll.

Your next question is coming from Bradford Ferguson.

Gayn, I'm curious about the cost to wait until you get to the motherboard or the package part or the final part. When we were talking about silicon carbide, you could have 24 or 48 SiC devices on -- in one inverter. And then the whole [ inverter is bad ], maybe that's $1,000 or $2,000, but the retail price on these NVIDIA is what $40,000?

Well, the rumor is they have really high margins. And I'd love it if the customers would give me credit for their sales price. They really only give me credit for their cost, but fair enough. But their cost is significantly higher than any silicon carbide module ever would be. Fair enough. Yes. I mean it's -- and by the way, to me, the craziest thing is how many people are doing it at the rack level. Like you're talking about all the way at the computer level side of things and burning it in. And obviously, a failure there is some -- a lot more expensive than it would be all the way back at wafer level. So you want to move -- in our industry, we refer to shift left. You want it to go as far left in the process as possible because it's way more cost effective. In this case, we have the first 2 steps in the left side, wafer level and when it's just the module level before that module is then put actually into the system level where you'd start to see all of the power supplies and everything else on it, like the GB200 module itself. And then you'd -- certainly before it goes over to Super Micro or to Dell or something in some main [ frame work ].

So one thing to put in perspective, and I don't think this is the value proposition yet, but it is interesting. We know that people are doing this burn-in at the rack level or the computer level, right? When you're in the computer level, basically, what burn-in does is you're basically applying stress condition of power via voltages of current and temperature. And what it does is it accelerates the life of the part without killing it. So I can take a device and in 24 hours make it look like it's 1 year old. And if it hasn't died by then, it's going to last 20 years. There's all kinds of books on it. You can read it, Google it or something, and you can find out about the basic process of burn-in and why you do it, okay? The key here is you want to do it in 24 hours or 4 hours or 2 hours or something along those lines to get the infant mortality rate out so it doesn't shift to the customer or take down your large language model compilation, okay?

Now when you're at system level, you can't run that rack at 125 degrees C. Everything will burn up. In fact, those racks are running cold water through them. They're probably running 30 degrees C temperature maximum. I know of a company that was trying to do some things to try and get an isolation of the GPU or the processors to 60 degrees C and their burn-in time was measured in days at the system level. That's what they were doing.

Now by moving it to wafer level, we can actually run the devices at a junction temperature at 125 degrees C, which is an accelerant that's more than 10x. We can also run the voltages extremely closely to their edge, and we can get the burn-in times to come down. So when we do that, we're actually applying only power to the processor, not the HBM, not all the inefficiencies everywhere else, not the rack and et cetera, just to the processor, and we can do it for a significantly less amount of time. The long and short of it is I can burn it in to the same level of quality at a fraction of the power. Now I don't think anyone is going to buy our system because of that per se, although there's some argument for it. But you know it's hard, getting a permit for a megawatt burn-in floor for your racks.

So people may buy our systems because they can actually get the power infrastructure to burn in hundreds of wafers at a time in parallel in a regular 480-volt, maybe 1,000 or multi-thousand amp circuit like we have in our building. You wouldn't be able to do that. If you had to burn in a bunch of racks in our building, you wouldn't be able to do it. But I could have 10 systems running with 9 wafers a piece and test the 100 wafers at a time with the power that I have in my facility, which is not that atypical of a facility in the Bay Area in Silicon Valley. So there is a value proposition there. In addition to the real cost savings, it might just be feasibility of power.

And so you mentioned the high-bandwidth flash. I'm hearing from some systems makers that they're focused on burn-in more just because of how expensive it is to scrap the whole motherboard or whatever. Do you have any kind of end to high-bandwidth memory? Or is it mainly the high-bandwidth flash?

Yes. I mean we talked that kind of our first -- our belief was that the engagements and the interest was first on the HB -- on the flash side of things. There is some things -- there's discussions on the DRAM side of things. I mean people are really scrambling to try and solve that through all kinds of mechanisms. And I won't get in all the technological things that we understand. There's very different implications when you talk about Micron, Samsung and Hynix and what they do and how they stack their memories and how they test them and burn them in that have kind of key differentiating features amongst themselves that make test interesting. We have a pretty good insight to that. I'm certainly not going to talk about it publicly, but that makes that interesting.

Bottom line is high bandwidth memory and then eventually high bandwidth flash needs to be burned in and needs to have a cycle and stress to remove that somehow or it's going to show up as it has been in the processors, in the AI stacks. And that's widely known and understood. And NVIDIA came out last, what, 6 months ago, yelled everybody and said, you need to figure out how to burn these things in before you ship them to me. We're sick and tired of it. So I'm not creating rumors. Those are widely understood reports.

And so right now, what we're seeing in the test community is sort of people overuse the Wild West, but there's just people scrambling for good ideas on how to address this and running as fast as they can. And it makes it exciting every day when you show up to work and you've got people that are like, how can you help us? So I love our hand. I love the cards we're dealt right now. I love our position. I love our visibility that we have within pretty much all -- I think we can now say we have communicated with every single one of the AI players. And we have a line into them and some thread either package or wafer level related that gives us some great insights. And I think we may be completely unique in that realm.

So I think the HBF is -- it looks pretty interesting. Again, that stuff takes time. But more and more things are breaking the infrastructure of test because of power at wafer level, and that's a good thing for us. We're really good at that.

Our system, I just throw out 3.5 kilowatts per wafer and most people would not know what that means. That's crazy. That's -- I mean, the world has wafer probers, thousands of those installed that has 300 watts of power capability. If you try to go get a prober that has 1,500 to 2,000 watts, it's a specialized $0.5 million prober. It's what we ship with the CP to the hard disk drive guys. That's one wafer's capacity. Our systems can do 3,500 watts on each of 9 wafers in one machine. Nobody can do 3.5 watts on 1 machine, okay -- I'm sorry, on one wafer on one machine. And so people are coming to us because of the thermal capabilities that are unique. Many, if not most of them are patented around the whole WaferPak concept and what we -- in the blade where we deliver thermal power without a wafer prober to create uniformity across a 3,000-plus watt wafer is really awesome, and it's fun to talk about with the technical people. And there -- I'd say that people are quite impressed with what they hear. And so it's great to rotate people through here. And by the way, they see it. We can show them it in operation when they come. This is not a story.

So I think the more and more of these things, the rising tide, the better shape we're in. And we're not abandoning our silicon carbide customers that are listening. I know they have ramps. They have opportunities. There's new fabs, there's new capacity coming on. They have new technologies. We're not abandoning the OEMs that the electric vehicle suppliers that we have met with personally and help them to develop the burn-in structures and the burn-in plans that they drive their vendors towards. We're fully committed to those guys, and we'll be there as they ramp, and we have more capacity than we ever had to be able to address their needs at a lower price point. And so I think we got that covered. We're not pivoting the company. We're just adding to it with this AI stuff.

On silicon carbide -- this would be my last one. Thank you for your generosity. On semi, I think one reason for their success is how aggressively they adopted Aehr Test Systems, FOX-XP systems. And we have a pretty large bankruptcy that happened with one of their competitors. Is there some kind of risk for the other chip makers if they don't take burden more seriously that it could spell issues for them?

So let me answer it this way. I have been invited to be a keynote speaker. I've spoken at multiple technical conferences around the world in silicon carbide and gallium nitride conferences. I have sat on several panels, and I have been very -- almost emotional in some of those discussions because we have seen the test and burn-in data of more -- almost all of the wafers in the world, okay? That's pretty bold, okay? Certainly more than anyone by far, okay? Everybody would like to think that they are special and their devices are just so much better than everybody else's. The reality is these devices fail during burn-in that represent the actual duty cycle or what's called the mission profile of electric vehicles.

What that means is if you do not burn them in, it is our belief and the data that we have, they will fail during the life of the car period. We've talked about that. I think I've quoted several times, whatever you do, it is my opinion, never buy an electric vehicle that didn't have burn-in for something in the 6 to 18 hours depending on the size of the engine and things like that. And there are OEM suppliers that have the data. They have failed customers who tried to qualify without doing an extensive burn-in and kick them out. And there have been very large suppliers that have lost in the industry because of quality and reliability. So my call to arms for everybody is there's no reason not to do wafer level burn-in or package part if you don't want to go with us, but whatever you do, don't skip it.

And we -- now with our 18-wafer system, even at high voltage, okay? So we've extended the capability with more capabilities, the cost of test at high voltage on our system with a capital depreciation of 5 years, et cetera, is about $0.05 per die on an 8-inch silicon carbide inverter wafer per hour -- per hour. You can do 24 hours of burn-in for $0.12 a die. And we have been very clear with that to all the OEMs, and they understand it. And so they drive for a level of quality that they can measure directly on our tools from their suppliers. And I think there is a difference between the people that have adopted a high level of quality and reliability and their market share. And all I'll say is I think ON Semiconductor has done an incredible job. In 2019, I think the year before, they had done $10 million in silicon carbide, and they're now kind of neck and neck for market leadership, and they have won well more than their fair share of the industry across the -- and I'm just repeating what they have said, "across Europe, the U.S., Japan and even China." They have done really, really well, and I commend them for that.

Your next question is coming from Larry Chlebina.

The news today on the AMD hookup with OpenAI, does that accelerate your evaluation process that you have with that second process? Or does that put more pressure on getting that done?

We have not talked to the level of detail to determine who it is. We've given enough hints that it's amongst the top suppliers of AI. It's not one of the ASIC guys. So I'm going to try and avoid being more specific. I will restate we are in conversation with every one of the suppliers, and I will then say, including those guys, okay? So my interpretation of that is, honestly, just sort of warms my heart to see the different people's commitment to the different types of processors.

I mean, without going into whether they are or could or might already be a customer or not, one thing about AMDs, and we've used that, again, not as an endorsement to them. We've used them as one of the examples because their MI325 has 8 processor chips in addition to, I think, at least that many HBM stacks plus the chipset in one substrate. If there's anyone that ought to be doing wafer-level burn-in, they would be amongst them, okay?

But for example, right now, we provide opportunities for our customers, including the likes of those guys to buy our tools for their burn-in requirements for qualifications, either themselves or to use it at one of the many test houses that have our systems to use our systems for package pump burn-in for the lowest cost alternative to things like system-level test systems that are being used out there. And if the most advanced process would be to do wafer level burn-in over time. So I won't comment on anything more than that, sorry, Larry. But I think in general, I think good news for the processor market is generally good for us right now.

The optical IO opportunity, is that going to involve actually new machines instead of upgrading existing machines? Is that transition going to happen here shortly? Or do they have more machines that they're going to...

The forecast includes both. So more upgrades and more new machines.

They're going to be running out of machines upgrade, I don't think sooner, right?

Yes. But there's also a scenario where they also have a bunch of products on the current machines that haven't gone away. And so it's sort of while you're upgrading these systems, they're backwards compatible, so you can still use the old WaferPaks and everything on them. But nevertheless, it's both. And then the other thing in it's subtle and those that don't know it, so we introduced a couple of years ago a front end to the FOX systems that allow you for fully hands-free operation with a WaferPak aligner. So you can come up to that with FOPs in this case, for 300-millimeter with both overhead or AGV, automatic ground vehicles, with an E86 compliant port that allows you to not even come and touch the machine. And the wafers can run around the fab and they can run a burn-in cycle and then move on and go to the next step of test. And...

You can upgrade them with the automation as well.

Exactly. So we took what -- we actually took their tools that they had bought in the past with our older WaferPak aligners and they are now upgrading to the new WaferPak Aligner, but instead of it being offline, it's integrated with the system. So that's kind of the good way. That's the advanced way of doing it. And particularly when you think about 300-millimeter fabs of like memory, big AI processors, even the silicon photonics, you kind of want to do it, that's the best way of doing it. It's full automation. But if they don't -- if they want offline, they can do that too with us.

On this HBF opportunity, is this a different company other than who you've been working with for 1.5 years -- what's that?

Same company, evolving requirements.

I mean is there -- do you expect anything to break loose on the original enterprise flash application? Or is this going to continue on?

It kind of feels like this is -- I say trumping it, but that word means something different these days. It feels like there -- this is such an enormous opportunity to the flash guys that it's sort of like the shiny bright light that may actually be better for us. I'm not sure it's better in terms of near term, like the opportunity is as fast. We'll see. But they could configure a system. The new system configuration is a super set of the old requirements. And so we had already worked on the previous one, and we're working on an updated proposal to show them how they could build blades in our system that could do both their old devices and the new ones. So maybe that will help it be better. I think it is, but it's always interesting when things change. But the one thing, none of their old tools will work with this HB Flash.

No, I wouldn't think so.

So that's -- maybe that's a good thing for us, right?

That's all I had. I'll see you tomorrow, I guess.

And Larry is just alluding to, we're going to be over -- we're here at SEMICON in Arizona, SEMICON West, and there's a CEO Summit that Chris alluded to. Although Chris, I don't know if you knew this, you were breaking up -- and it sounds like we had operator problems with the operator connection. The new one has been a lot better. So sorry about that to folks that are on the line.

Operator, any other questions?

I'm showing there are no further questions in queue at this time. And I'd now like to hand the floor back to management for closing remarks.

Thank you. I was -- I meant to try and work this in. I'm going to do one little other thing. So the other one we haven't talked about, and maybe next call, we'll spend a little bit more time on. We did a deep dive last time on the AI side of things. This time was more of an update on things. But there's other products that we have. And one of the things I want to highlight is the activities that we have within package part outside of AI. It turns out that with the Incal acquisition, they have a low power and a medium power system called Echo and Tahoe that we've been shipping a lot of systems kind of quietly in the background.

And recently, we've had some customers, I think, egged on by some competitors that were saying, "Oh, there isn't even doing that stuff anymore. And that's just not true. These products are beloved by the customers for their software, the flexibility, and they did a really good job. In fact, those products were the products that honestly took air out of the packaged part burn-in market because the products are just better than ours. And we still love those. And if you come on our floor, you'll see them being built right alongside of the Sonoma systems and our FOX systems as well.

So I just a message out to our customers, we still love you. We're still committed to supporting those products, and we have way more manufacturing capacity than Incal ever did, so don't be timid. We're happy to continue to ship as we have, and we'll give the investors a little bit more insight on some of the systems we're building right now, some of the interesting applications that they're going into that are also another part of this overall shift of all semiconductors needing more and more reliability test from qualifications to burn-in.

So with that, I thank everybody, and we appreciate your time and putting up with a little bit of the stuff going on with the call. We'll work on that and make sure we do better next time. And we appreciate you. Thank you now. Goodbye.

Thank you. This does conclude today's conference call. You may disconnect your phone lines at this time, and have a wonderful day. Thank you once again for your participation.